Marvell ARM64 SoCs support
Contact: Zyta Szpak <zr@semihalf.com>
Contact: Kornel Dulęba <mindal@semihalf.com>
Contact: Marcin Wojtas <mw@semihalf.com>
The Semihalf team is working on improving the FreeBSD support for the Marvell Octeon TX2 CN913x and Armada 7k/8k SoC families.
Marvell Armada 7k8k and Octeon TX2 CN913x SoC families are quad-core 64-bit ARMv8 Cortex-A72 processors with high speed peripherals including 10 Gb Ethernet, PCIe 3.0, SATA 3.0 and USB 3.0 for a wide range of networking, storage, security and industrial applications.
Although the mentioned SoCs are mostly supported in FreeBSD HEAD, some pieces required improvements.
Applied changes:
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Add missing frequency modes in ap806_clock driver (commit a86b0839d7bf)
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Multiple fixes in mvebu_gpio driver - in cooperation with mmel (commit a5dce53b75d8)
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Fix device tree data parsing in mv\_ap806\_gicp interrupt controller driver (commit 622d17da46eb)
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Rework the ICU interrupt controller (mv\_cp110\_icu) and its parent (mv\_ap806\_gicp), so that they no longer rely on the data provided by firmware, which fixes booting the OS from the newer U-Boot/TF-A revisions (D28803)
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PCIE Designware driver (pci_dw) fixes:
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Correct setting of outbound I/O ATU window.
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Allow mapping ATU windows bigger than 4GB.
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Generic improvements that enable proper user-space mapping and access of the PCI BARs
TODO:
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Upstream PCIE improvements.
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Improve and merge ICU support rework.
Sponsor: Marvell
Last modified on: May 1, 2021 by Daniel Ebdrup Jensen