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PMC(3)                 FreeBSD Library Functions Manual                 PMC(3)

NAME
     pmc_allocate, pmc_attach, pmc_capabilities, pmc_configure_logfile,
     pmc_cpuinfo, pmc_detach, pmc_disable, pmc_enable,
     pmc_event_names_of_class, pmc_flush_logfile, pmc_get_driver_stats,
     pmc_get_msr, pmc_init, pmc_name_of_capability, pmc_name_of_class,
     pmc_name_of_cputype, pmc_name_of_event, pmc_name_of_mode,
     pmc_name_of_state, pmc_ncpu, pmc_npmc, pmc_pmcinfo, pmc_read,
     pmc_release, pmc_rw, pmc_set, pmc_start, pmc_stop, pmc_width, pmc_write,
     pmc_writelog - programming API for using hardware performance monitoring
     counters

LIBRARY
     Performance Counters Library (libpmc, -lpmc)

SYNOPSIS
     #include <pmc.h>

     int
     pmc_allocate(const char *eventspecifier, enum pmc_mode mode,
         uint32_t flags, uint32_t cpu, pmc_id_t *pmcid);

     int
     pmc_attach(pmc_id_t pmcid, pid_t pid);

     int
     pmc_capabilities(pmc_id_t pmc, uint32_t *caps);

     int
     pmc_configure_logfile(int fd);

     int
     pmc_cpuinfo(const struct pmc_cpuinfo **cpu_info);

     int
     pmc_detach(pmc_id_t pmcid, pid_t pid);

     int
     pmc_disable(uint32_t cpu, int pmc);

     int
     pmc_enable(uint32_t cpu, int pmc);

     int
     pmc_event_names_of_class(enum pmc_class cl, const char ***eventnames,
         int *nevents);

     int
     pmc_flush_logfile(void);

     int
     pmc_get_driver_stats(struct pmc_driverstats *gms);

     int
     pmc_get_msr(pmc_id_t pmc, uint32_t *msr);

     int
     pmc_init(void);

     const char *
     pmc_name_of_capability(enum pmc_caps pc);

     const char *
     pmc_name_of_class(enum pmc_class pc);

     const char *
     pmc_name_of_cputype(enum pmc_cputype ct);

     const char *
     pmc_name_of_disposition(enum pmc_disp pd);

     const char *
     pmc_name_of_event(enum pmc_event pe);

     const char *
     pmc_name_of_mode(enum pmc_mode pm);

     const char *
     pmc_name_of_state(enum pmc_state ps);

     int
     pmc_ncpu(void);

     int
     pmc_npmc(uint32_t cpu);

     int
     pmc_pmcinfo(uint32_t cpu, struct pmc_pmcinfo **pmc_info);

     int
     pmc_read(pmc_id_t pmc, pmc_value_t *value);

     int
     pmc_release(pmc_id_t pmc);

     int
     pmc_rw(pmc_id_t pmc, pmc_value_t newvalue, pmc_value_t *oldvaluep);

     int
     pmc_set(pmc_id_t pmc, pmc_value_t value);

     int
     pmc_start(pmc_id_t pmc);

     int
     pmc_stop(pmc_id_t pmc);

     int
     pmc_write(pmc_id_t pmc, pmc_value_t value);

     int
     pmc_writelog(uint32_t userdata);

     int
     pmc_width(pmc_id_t pmc, uint32_t *width);

DESCRIPTION
     These functions implement a high-level library for using the system's
     hardware performance counters.

     PMCs are allocated using pmc_allocate(), released using pmc_release() and
     read using pmc_read().  Allocated PMCs may be started or stopped at any
     time using pmc_start() and pmc_stop() respectively.  An allocated PMC may
     be of ``global'' scope, meaning that the PMC measures system-wide events,
     or ``process-private'' scope, meaning that the PMC only counts hardware
     events when the allocating process (or, optionally, its children) are
     active.

     PMCs may further be in ``counting mode'', or in ``sampling mode''.
     Sampling mode PMCs deliver an interrupt to the CPU after a configured
     number of hardware events have been seen.  A process-private sampling
     mode PMC will cause its owner process to get periodic SIGPROF interrupts,
     while a global sampling mode PMC is used to do system-wide statistical
     sampling (see hwpmc(4)).  The sampling rate desired of a sampling-mode
     PMC is set using pmc_set().  Counting mode PMCs do not interrupt the CPU;
     their values can be read using pmc_read().

     System-wide statistical sampling is configured by allocating at least one
     sampling mode PMC with global scope, and when a log file is configured
     using pmc_configure_logfile().  The hwpmc(4) driver manages system-wide
     statistical sampling; for more information please see hwpmc(4).

   Application Programming Interface
     The function pmc_init() initializes the pmc(3) library.  This function
     must be called first, before any of the other functions in the library.

     The function pmc_allocate() allocates a counter that counts the events
     named by eventspecifier, and writes the allocated counter ID to *pmcid.
     Argument eventspecifier comprises an PMC event name followed by an
     optional comma separated list of keywords and qualifiers.  The allowed
     syntax for eventspecifier is processor architecture specific and is
     listed in section EVENT SPECIFIERS below.  The desired PMC mode is
     specified by mode, and any mode specific modifiers are specified using
     flags.  The cpu argument is the value PMC_CPU_ANY, or names the CPU the
     allocation is to be on.  Requesting a specific CPU only makes sense for
     global PMCs; process-private PMC allocations should always specify
     PMC_CPU_ANY.

     By default, a PMC configured in process-virtual counting mode is set up
     to profile its owner process.  The function pmc_attach() may be used to
     attach the PMC to a different process.  It needs to be called before the
     counter is first started with pmc_start().  The function pmc_detach() may
     be used to detach a PMC from a process it was attached to using a prior
     call to pmc_attach().

     The function pmc_release() releases a PMC previously allocated with
     pmc_allocate().  This function call implicitly detaches the PMC from all
     its target processes.

     An allocated PMC may be started and stopped using pmc_start() and
     pmc_stop() respectively.

     The current value of a PMC may be read with pmc_read() and written using
     pmc_write(), provided the underlying hardware supports these operations
     on the allocated PMC.  The read and write operation may be combined using
     pmc_rw().

     The function pmc_capabilities() sets argument caps to a bitmask of
     capabilities supported by the PMC denoted by argument pmc.  The function
     pmc_width() sets argument width to the width of the PMC denoted by
     argument pmc.

     The pmc_configure_logfile() function causes the hwpmc(4) driver to log
     performance data to file corresponding to the process' file handle fd.
     If argument fd is -1, then any previously configured logging is reset and
     all data queued to be written are discarded.

     The pmc_flush_logfile() function will send all data queued inside the
     hwpmc(4) driver to the configured log file before returning.  The
     pmc_writelog() function will append a log entry containing the argument
     userdata to the log file.

     The function pmc_set() configures a sampling PMC pmc to interrupt every
     value events.  For counting PMCs, pmc_set() sets the initial value of the
     PMC to value.

     The function pmc_get_driver_statistics() copies a snapshot of the usage
     statistics maintained by hwpmc(4) into the memory area pointed to by
     argument gms.

   Signal Handling Requirements
     Applications using PMCs are required to handle the following signals:

     SIGBUS  When the hwpmc(4) module is unloaded using kldunload(8),
             processes that have PMCs allocated to them will be sent a SIGBUS
             signal.

     SIGIO   The hwpmc(4) driver will send a PMC owning process a SIGIO signal
             if:

             +o   If any process-mode PMC allocated by it loses all its target
                 processes.

             +o   If the driver encounters an error when writing log data to a
                 configured log file.  This error may be retrieved by a
                 subsequent call to pmc_flush_logfile().

   Convenience Functions
     The function pmc_ncpu() returns the number of CPUs present in the system.

     The function pmc_npmc() returns the number of PMCs supported on CPU cpu.
     The function pmc_cpuinfo() sets argument cpu_info to point to a structure
     with information about the system's CPUs.  Function pmc_pmcinfo() returns
     information about the current state of CPU cpu's PMCs.  This function
     sets argument *pmc_info to point to a memory area allocated with
     calloc(3).  The caller is expected to free() the area when done.

     The functions pmc_name_of_capability(), pmc_name_of_class(),
     pmc_name_of_cputype(), pmc_name_of_disposition(), pmc_name_of_event(),
     pmc_name_of_mode() and pmc_name_of_state() are useful for code wanting to
     print error messages.  They return const char * pointers to human-
     readable representations of their arguments.  These return values should
     not be freed using free(3).

     The function pmc_event_names_of_class() returns a list of event names
     supported by a given PMC class cl.  On successful return, an array of
     const char * pointers to the names of valid events supported by class cl
     is allocated by the library using malloc(3), and a pointer to this array
     is returned in the location pointed to by eventnames.  The number of
     pointers allocated is returned in the location pointed to by nevents.

   Administration
     Individual PMCs may be enabled or disabled on a given CPU using
     pmc_enable() and pmc_disable() respectively.  For these functions, cpu is
     the CPU number, and pmc is the index of the PMC to be operated on.  Only
     the super-user is allowed to enable and disable PMCs.

   x86 Architecture Specific API
     The pmc_get_msr() function returns the processor model specific register
     number associated with pmc.  Applications may use the x86 RDPMC
     instruction to directly read the contents of the PMC.

EVENT SPECIFIERS
     Event specifiers are strings comprising of an event name, followed by
     optional parameters modifying the semantics of the hardware event being
     probed.  Event names are PMC architecture dependent, but the hwpmc(4)
     library defines machine independent aliases for commonly used events.

   Event Name Aliases
     Event name aliases are CPU architecture independent names for commonly
     used events.  The following aliases are known to this version of the
     pmc(3) library:

     branches
             Measure the number of branches retired.

     branch-mispredicts
             Measure the number of retired branches that were mispredicted.

     cycles  Measure processor cycles.  This event is implemented using the
             processor's Time Stamp Counter register.

     dc-misses
             Measure the number of data cache misses.

     ic-misses
             Measure the number of instruction cache misses.

     instructions
             Measure the number of instructions retired.

     interrupts
             Measure the number of interrupts seen.

   Time Stamp Counter (TSC)
     The timestamp counter is a monotonically non-decreasing counter that
     counts processor cycles.

     In the i386 architecture, this counter may be selected by requesting an
     event with event specifier ``tsc''.  The ``tsc'' event does not support
     any further qualifiers.  It can only be allocated in system-wide counting
     mode, and is a read-only counter.  Multiple processes are allowed to
     allocate the TSC.  Once allocated, it may be read using the pmc_read()
     function, or by using the RDTSC instruction.

   AMD (K7) PMCs
     These PMCs are present in the AMD Athlon series of CPUs and are
     documented in: AMD Athlon Processor x86 Code Optimization Guide,
     Publication No. 22007, Advanced Micro Devices, Inc., February 2002.

     Event specifiers for AMD K7 PMCs can have the following optional
     qualifiers:

     count=value
             Configure the counter to increment only if the number of
             configured events measured in a cycle is greater than or equal to
             value.

     edge    Configure the counter to only count negated-to-asserted
             transitions of the conditions expressed by the other qualifiers.
             In other words, the counter will increment only once whenever a
             given condition becomes true, irrespective of the number of
             clocks during which the condition remains true.

     inv     Invert the sense of comparision when the ``count'' qualifier is
             present, making the counter to increment when the number of
             events per cycle is less than the value specified by the
             ``count'' qualifier.

     os      Configure the PMC to count events happening at privilege level 0.

     unitmask=mask
             This qualifier is used to further qualify a select few events,
             ``k7-dc-refills-from-l2'', ``k7-dc-refills-from-system'' and
             ``k7-dc-writebacks''.  Here mask is a string of the following
             characters optionally separated by `+' characters:

             m       Count operations for lines in the ``Modified'' state.
             o       Count operations for lines in the ``Owner'' state.
             e       Count operations for lines in the ``Exclusive'' state.
             s       Count operations for lines in the ``Shared'' state.
             i       Count operations for lines in the ``Invalid'' state.

             If no ``unitmask'' qualifier is specified, the default is to
             count events for caches lines in any of the above states.

     usr     Configure the PMC to count events occurring at privilege levels
             1, 2 or 3.

     If neither of the ``os'' or ``usr'' qualifiers were specified, the
     default is to enable both.

     The event specifiers supported on AMD K7 PMCs are:

     k7-dc-accesses
             Count data cache accesses.

     k7-dc-misses
             Count data cache misses.

     k7-dc-refills-from-l2 [,unitmask=mask]
             Count data cache refills from L2 cache.  This event may be
             further qualified using the ``unitmask'' qualifier.

     k7-dc-refills-from-system [,unitmask=mask]
             Count data cache refills from system memory.  This event may be
             further qualified using the ``unitmask'' qualifier.

     k7-dc-writebacks [,unitmask=mask]
             Count data cache writebacks.  This event may be further qualified
             using the ``unitmask'' qualifier.

     k7-l1-dtlb-miss-and-l2-dtlb-hits
             Count L1 DTLB misses and L2 DTLB hits.

     k7-l1-and-l2-dtlb-misses
             Count L1 and L2 DTLB misses.

     k7-misaligned-references
             Count misaligned data references.

     k7-ic-fetches
             Count instruction cache fetches.

     k7-ic-misses
             Count instruction cache misses.

     k7-l1-itlb-misses
             Count L1 ITLB misses that are L2 ITLB hits.

     k7-l1-l2-itlb-misses
             Count L1 (and L2) ITLB misses.

     k7-retired-instructions
             Count all retired instructions.

     k7-retired-ops
             Count retired ops.

     k7-retired-branches
             Count all retired branches (conditional, unconditional,
             exceptions and interrupts).

     k7-retired-branches-mispredicted
             Count all misprediced retired branches.

     k7-retired-taken-branches
             Count retired taken branches.

     k7-retired-taken-branches-mispredicted
             Count mispredicted taken branches that were retired.

     k7-retired-far-control-transfers
             Count retired far control transfers.

     k7-retired-resync-branches
             Count retired resync branches (non control transfer branches).

     k7-interrupts-masked-cycles
             Count the number of cycles when the processor's IF flag was zero.

     k7-interrupts-masked-while-pending-cycles
             Count the number of cycles interrupts were masked while pending
             due to the processor's IF flag being zero.

     k7-hardware-interrupts
             Count the number of taken hardware interrupts.

   AMD (K8) PMCs
     These PMCs are present in the AMD Athlon64 and AMD Opteron series of
     CPUs.  They are documented in: BIOS and Kernel Developer's Guide for the
     AMD Athlon(tm) 64 and AMD Opteron Processors, Publication No. 26094,
     Advanced Micro Devices, Inc., April 2004.

     Event specifiers for AMD K8 PMCs can have the following optional
     qualifiers:

     count=value
             Configure the counter to increment only if the number of
             configured events measured in a cycle is greater than or equal to
             value.

     edge    Configure the counter to only count negated-to-asserted
             transitions of the conditions expressed by the other fields.  In
             other words, the counter will increment only once whenever a
             given condition becomes true, irrespective of the number of
             clocks during which the condition remains true.

     inv     Invert the sense of comparision when the ``count'' qualifier is
             present, making the counter to increment when the number of
             events per cycle is less than the value specified by the
             ``count'' qualifier.

     mask=qualifier
             Many event specifiers for AMD K8 PMCs need to be additionally
             qualified using a mask qualifier.  These additional qualifiers
             are event-specific and are documented along with their associated
             event specifiers below.

     os      Configure the PMC to count events happening at privilege level 0.

     usr     Configure the PMC to count events occurring at privilege levels
             1, 2 or 3.

     If neither of the ``os'' or ``usr'' qualifiers were specified, the
     default is to enable both.

     The event specifiers supported on AMD K8 PMCs are:

     k8-bu-cpu-clk-unhalted
             Count the number of clock cycles when the CPU is not in the HLT
             or STPCLK states.

     k8-bu-fill-request-l2-miss [,mask=qualifier]
             Count fill requests that missed in the L2 cache.  This event may
             be further qualified using qualifier, which is a `+' separated
             set of the following keywords:

             dc-fill
                     Count data cache fill requests.
             ic-fill
                     Count instruction cache fill requests.
             tlb-reload
                     Count TLB reloads.

             The default is to count all types of requests.

     k8-bu-internal-l2-request [,mask=qualifier]
             Count internally generated requests to the L2 cache.  This event
             may be further qualified using qualifier, which is a `+'
             separated set of the following keywords:

             cancelled
                     Count cancelled requests.
             dc-fill
                     Count data cache fill requests.
             ic-fill
                     Count instruction cache fill requests.
             tag-snoop
                     Count tag snoop requests.
             tlb-reload
                     Count TLB reloads.

             The default is to count all types of requests.

     k8-dc-access
             Count data cache accesses including microcode scratchpad
             accesses.

     k8-dc-copyback [,mask=qualifier]
             Count data cache copyback operations.  This event may be further
             qualified using qualifier, which is a `+' separated set of the
             following keywords:

             exclusive
                     Count operations for lines in the ``exclusive'' state.
             invalid
                     Count operations for lines in the ``invalid'' state.
             modified
                     Count operations for lines in the ``modified'' state.
             owner   Count operations for lines in the ``owner'' state.
             shared  Count operations for lines in the ``shared'' state.

             The default is to count operations for lines in all the above
             states.

     k8-dc-dcache-accesses-by-locks [,mask=qualifier]
             Count data cache accesses by lock instructions.  This event is
             only available on processors of revision C or later vintage.
             This event may be further qualified using qualifier, which is a
             `+' separated set of the following keywords:

             accesses
                     Count data cache accesses by lock instructions.
             misses  Count data cache misses by lock instructions.

             The default is to count all accesses.

     k8-dc-dispatched-prefetch-instructions [,mask=qualifier]
             Count the number of dispatched prefetch instructions.  This event
             may be further qualified using qualifier, which is a `+'
             separated set of the following keywords:

             load    Count load operations.
             nta     Count non-temporal operations.
             store   Count store operations.

             The default is to count all operations.

     k8-dc-l1-dtlb-miss-and-l2-dtlb-hit
             Count L1 DTLB misses that are L2 DTLB hits.

     k8-dc-l1-dtlb-miss-and-l2-dtlb-miss
             Count L1 DTLB misses that are also misses in the L2 DTLB.

     k8-dc-microarchitectural-early-cancel-of-an-access
             Count microarchitectural early cancels of data cache accesses.

     k8-dc-microarchitectural-late-cancel-of-an-access
             Count microarchitectural late cancels of data cache accesses.

     k8-dc-misaligned-data-reference
             Count misaligned data references.

     k8-dc-miss
             Count data cache misses.

     k8-dc-one-bit-ecc-error [,mask=qualifier]
             Count one bit ECC errors found by the scrubber.  This event may
             be further qualified using qualifier, which is a `+' separated
             set of the following keywords:

             scrubber
                     Count scrubber detected errors.
             piggyback
                     Count piggyback scrubber errors.

             The default is to count both kinds of errors.

     k8-dc-refill-from-l2 [,mask=qualifier]
             Count data cache refills from L2 cache.  This event may be
             further qualified using qualifier, which is a `+' separated set
             of the following keywords:

             exclusive
                     Count operations for lines in the ``exclusive'' state.
             invalid
                     Count operations for lines in the ``invalid'' state.
             modified
                     Count operations for lines in the ``modified'' state.
             owner   Count operations for lines in the ``owner'' state.
             shared  Count operations for lines in the ``shared'' state.

             The default is to count operations for lines in all the above
             states.

     k8-dc-refill-from-system [,mask=qualifier]
             Count data cache refills from system memory.  This event may be
             further qualified using qualifier, which is a `+' separated set
             of the following keywords:

             exclusive
                     Count operations for lines in the ``exclusive'' state.
             invalid
                     Count operations for lines in the ``invalid'' state.
             modified
                     Count operations for lines in the ``modified'' state.
             owner   Count operations for lines in the ``owner'' state.
             shared  Count operations for lines in the ``shared'' state.

             The default is to count operations for lines in all the above
             states.

     k8-fp-dispatched-fpu-ops [,mask=qualifier]
             Count the number of dispatched FPU ops.  This event is supported
             in revision B and later CPUs.  This event may be further
             qualified using qualifier, which is a `+' separated set of the
             following keywords:

             add-pipe-excluding-junk-ops
                     Count add pipe ops excluding junk ops.
             add-pipe-junk-ops
                     Count junk ops in the add pipe.
             multiply-pipe-excluding-junk-ops
                     Count multiply pipe ops excluding junk ops.
             multiply-pipe-junk-ops
                     Count junk ops in the multiply pipe.
             store-pipe-excluding-junk-ops
                     Count store pipe ops excluding junk ops
             store-pipe-junk-ops
                     Count junk ops in the store pipe.

             The default is to count all types of ops.

     k8-fp-cycles-with-no-fpu-ops-retired
             Count cycles when no FPU ops were retired.  This event is
             supported in revision B and later CPUs.

     k8-fp-dispatched-fpu-fast-flag-ops
             Count dispatched FPU ops that use the fast flag interface.  This
             event is supported in revision B and later CPUs.

     k8-fr-decoder-empty
             Count cycles when there was nothing to dispatch (i.e., the
             decoder was empty).

     k8-fr-dispatch-stalls
             Count all dispatch stalls.

     k8-fr-dispatch-stall-for-segment-load
             Count dispatch stalls for segment loads.

     k8-fr-dispatch-stall-for-serialization
             Count dispatch stalls for serialization.

     k8-fr-dispatch-stall-from-branch-abort-to-retire
             Count dispatch stalls from branch abort to retiral.

     k8-fr-dispatch-stall-when-fpu-is-full
             Count dispatch stalls when the FPU is full.

     k8-fr-dispatch-stall-when-ls-is-full
             Count dispatch stalls when the load/store unit is full.

     k8-fr-dispatch-stall-when-reorder-buffer-is-full
             Count dispatch stalls when the reorder buffer is full.

     k8-fr-dispatch-stall-when-reservation-stations-are-full
             Count dispatch stalls when reservation stations are full.

     k8-fr-dispatch-stall-when-waiting-for-all-to-be-quiet
             Count dispatch stalls when waiting for all to be quiet.

     k8-fr-dispatch-stall-when-waiting-far-xfer-or-resync-branch-pending
             Count dispatch stalls when a far control transfer or a resync
             branch is pending.

     k8-fr-fpu-exceptions [,mask=qualifier]
             Count FPU exceptions.  This event is supported in revision B and
             later CPUs.  This event may be further qualified using qualifier,
             which is a `+' separated set of the following keywords:

             sse-and-x87-microtraps
                     Count SSE and x87 microtraps.
             sse-reclass-microfaults
                     Count SSE reclass microfaults
             sse-retype-microfaults
                     Count SSE retype microfaults
             x87-reclass-microfaults
                     Count x87 reclass microfaults.

             The default is to count all types of exceptions.

     k8-fr-interrupts-masked-cycles
             Count cycles when interrupts were masked (by CPU RFLAGS field IF
             was zero).

     k8-fr-interrupts-masked-while-pending-cycles
             Count cycles while interrupts were masked while pending (i.e.,
             cycles when INTR was asserted while CPU RFLAGS field IF was
             zero).

     k8-fr-number-of-breakpoints-for-dr0
             Count the number of breakpoints for DR0.

     k8-fr-number-of-breakpoints-for-dr1
             Count the number of breakpoints for DR1.

     k8-fr-number-of-breakpoints-for-dr2
             Count the number of breakpoints for DR2.

     k8-fr-number-of-breakpoints-for-dr3
             Count the number of breakpoints for DR3.

     k8-fr-retired-branches
             Count retired branches including exceptions and interrupts.

     k8-fr-retired-branches-mispredicted
             Count mispredicted retired branches.

     k8-fr-retired-far-control-transfers
             Count retired far control transfers (which are always
             mispredicted).

     k8-fr-retired-fastpath-double-op-instructions [,mask=qualifier]
             Count retired fastpath double op instructions.  This event is
             supported in revision B and later CPUs.  This event may be
             further qualified using qualifier, which is a `+' separated set
             of the following keywords:

             low-op-pos-0
                     Count instructions with the low op in position 0.
             low-op-pos-1
                     Count instructions with the low op in position 1.
             low-op-pos-2
                     Count instructions with the low op in position 2.

             The default is to count all types of instructions.

     k8-fr-retired-fpu-instructions [,mask=qualifier]
             Count retired FPU instructions.  This event is supported in
             revision B and later CPUs.  This event may be further qualified
             using qualifier, which is a `+' separated set of the following
             keywords:

             mmx-3dnow
                     Count MMX and 3DNow! instructions.
             packed-sse-sse2
                     Count packed SSE and SSE2 instructions.
             scalar-sse-sse2
                     Count scalar SSE and SSE2 instructions
             x87     Count x87 instructions.

             The default is to count all types of instructions.

     k8-fr-retired-near-returns
             Count retired near returns.

     k8-fr-retired-near-returns-mispredicted
             Count mispredicted near returns.

     k8-fr-retired-resyncs
             Count retired resyncs (non-control transfer branches).

     k8-fr-retired-taken-hardware-interrupts
             Count retired taken hardware interrupts.

     k8-fr-retired-taken-branches
             Count retired taken branches.

     k8-fr-retired-taken-branches-mispredicted
             Count retired taken branches that were mispredicted.

     k8-fr-retired-taken-branches-mispredicted-by-addr-miscompare
             Count retired taken branches that were mispredicted only due to
             an address miscompare.

     k8-fr-retired-uops
             Count retired uops.

     k8-fr-retired-x86-instructions
             Count retired x86 instructions including exceptions and
             interrupts.

     k8-ic-fetch
             Count instruction cache fetches.

     k8-ic-instruction-fetch-stall
             Count cycles in stalls due to instruction fetch.

     k8-ic-l1-itlb-miss-and-l2-itlb-hit
             Count L1 ITLB misses that are L2 ITLB hits.

     k8-ic-l1-itlb-miss-and-l2-itlb-miss
             Count ITLB misses that miss in both L1 and L2 ITLBs.

     k8-ic-microarchitectural-resync-by-snoop
             Count microarchitectural resyncs caused by snoops.

     k8-ic-miss
             Count instruction cache misses.

     k8-ic-refill-from-l2
             Count instruction cache refills from L2 cache.

     k8-ic-refill-from-system
             Count instruction cache refills from system memory.

     k8-ic-return-stack-hits
             Count hits to the return stack.

     k8-ic-return-stack-overflow
             Count overflows of the return stack.

     k8-ls-buffer2-full
             Count load/store buffer2 full events.

     k8-ls-locked-operation [,mask=qualifier]
             Count locked operations.  For revision C and later CPUs, the
             following qualifiers are supported:

             cycles-in-request
                     Count the number of cycles in the lock request/grant
                     stage.
             cycles-to-complete
                     Count the number of cycles a lock takes to complete once
                     it is non-speculative and is the older load/store
                     operation.
             locked-instructions
                     Count the number of lock instructions executed.

             The default is to count the number of lock instructions executed.

     k8-ls-microarchitectural-late-cancel
             Count microarchitectural late cancels of operations in the
             load/store unit.

     k8-ls-microarchitectural-resync-by-self-modifying-code
             Count microarchitectural resyncs caused by self-modifying code.

     k8-ls-microarchitectural-resync-by-snoop
             Count microarchitectural resyncs caused by snoops.

     k8-ls-retired-cflush-instructions
             Count retired CFLUSH instructions.

     k8-ls-retired-cpuid-instructions
             Count retired CPUID instructions.

     k8-ls-segment-register-load [,mask=qualifier]
             Count segment register loads.  This event may be further
             qualified using qualifier, which is a `+' separated set of the
             following keywords:
             cs      Count CS register loads.
             ds      Count DS register loads.
             es      Count ES register loads.
             fs      Count FS register loads.
             gs      Count GS register loads.
             ss      Count SS register loads.

             The default is to count all types of loads.

     k8-nb-memory-controller-bypass-saturation [,mask=qualifier]
             Count memory controller bypass counter saturation events.  This
             event may be further qualified using qualifier, which is a `+'
             separated set of the following keywords:

             dram-controller-interface-bypass
                     Count DRAM controller interface bypass.
             dram-controller-queue-bypass
                     Count DRAM controller queue bypass.
             memory-controller-hi-pri-bypass
                     Count memory controller high priority bypasses.
             memory-controller-lo-pri-bypass
                     Count memory controller low priority bypasses.

     k8-nb-memory-controller-dram-slots-missed
             Count memory controller DRAM command slots missed (in MemClks).

     k8-nb-memory-controller-page-access-event [,mask=qualifier]
             Count memory controller page access events.  This event may be
             further qualified using qualifier, which is a `+' separated set
             of the following keywords:

             page-conflict
                     Count page conflicts.
             page-hit
                     Count page hits.
             page-miss
                     Count page misses.

             The default is to count all types of events.

     k8-nb-memory-controller-page-table-overflow
             Count memory control page table overflow events.

     k8-nb-probe-result [,mask=qualifier]
             Count probe events.  This event may be further qualified using
             qualifier, which is a `+' separated set of the following
             keywords:

             probe-hit
                     Count all probe hits.
             probe-hit-dirty-no-memory-cancel
                     Count probe hits without memory cancels.
             probe-hit-dirty-with-memory-cancel
                     Count probe hits with memory cancels.
             probe-miss
                     Count probe misses.

     k8-nb-sized-commands [,mask=qualifier]
             Count sized commands issued.  This event may be further qualified
             using qualifier, which is a `+' separated set of the following
             keywords:

             nonpostwrszbyte
             nonpostwrszdword
             postwrszbyte
             postwrszdword
             rdszbyte
             rdszdword
             rdmodwr

             The default is to count all types of commands.

     k8-nb-memory-controller-turnaround [,mask=qualifier]
             Count memory control turnaround events.  This event may be
             further qualified using qualifier, which is a `+' separated set
             of the following keywords:

             dimm-turnaround
                     Count DIMM turnarounds.
             read-to-write-turnaround
                     Count read to write turnarounds.
             write-to-read-turnaround
                     Count write to read turnarounds.

             The default is to count all types of events.

     k8-nb-ht-bus0-bandwidth [,mask=qualifier]

     k8-nb-ht-bus1-bandwidth [,mask=qualifier]

     k8-nb-ht-bus2-bandwidth [,mask=qualifier]
             Count events on the HyperTransport(tm) buses.  These events may
             be further qualified using qualifier, which is a `+' separated
             set of the following keywords:

             buffer-release
                     Count buffer release messages sent.
             command
                     Count command messages sent.
             data    Count data messages sent.
             nop     Count nop messages sent.

             The default is to count all types of messages.

   Intel P6 PMCS
     Intel P6 PMCs are present in Intel Pentium Pro, Pentium II, Celeron,
     Pentium III and Pentium M processors.

     These CPUs have two counters.  Some events may only be used on specific
     counters and some events are defined only on specific processor models.

     These PMCs are documented in Volume 3: System Programming Guide, IA-32
     Intel(R) Architecture Software Developer's Manual, Order Number
     245472-012, Intel Corporation, 2003.

     Some of these events are affected by processor errata described in
     Intel(R) Pentium(R) III Processor Specification Update, Document Number:
     244453-054, Intel Corporation, April 2005.

     Event specifiers for Intel P6 PMCs can have the following common
     qualifiers:

     cmask=value
             Configure the PMC to increment only if the number of configured
             events measured in a cycle is greater than or equal to value.

     edge    Configure the PMC to count the number of deasserted to asserted
             transitions of the conditions expressed by the other qualifiers.
             If specified, the counter will increment only once whenever a
             condition becomes true, irrespective of the number of clocks
             during which the condition remains true.

     inv     Invert the sense of comparision when the ``cmask'' qualifier is
             present, making the counter increment when the number of events
             per cycle is less than the value specified by the ``cmask''
             qualifier.

     os      Configure the PMC to count events happening at processor
             privilege level 0.

     umask=value
             This qualifier is used to further qualify the event selected (see
             below).

     usr     Configure the PMC to count events occurring at privilege levels
             1, 2 or 3.

     If neither of the ``os'' or ``usr'' qualifiers are specified, the default
     is to enable both.

     The event specifiers supported by Intel P6 PMCs are:

     p6-baclears
             Count the number of times a static branch prediction was made by
             the branch decoder because the BTB did not have a prediction.

     p6-br-bac-missp-exec
             (Pentium M) Count the number of branch instructions executed that
             where mispredicted at the Front End (BAC).

     p6-br-bogus
             Count the number of bogus branches.

     p6-br-call-exec
             (Pentium M) Count the number of call instructions executed.

     p6-br-call-missp-exec
             (Pentium M) Count the number of call instructions executed that
             were mispredicted.

     p6-br-cnd-exec
             (Pentium M) Count the number of conditional branch instructions
             executed.

     p6-br-cnd-missp-exec
             (Pentium M) Count the number of conditional branch instructions
             executed that were mispredicted.

     p6-br-ind-call-exec
             (Pentium M) Count the number of indirect call instructions
             executed.

     p6-br-ind-exec
             (Pentium M) Count the number of indirect branch instructions
             executed.

     p6-br-ind-missp-exec
             (Pentium M) Count the number of indirect branch instructions
             executed that were mispredicted.

     p6-br-inst-decoded
             Count the number of branch instructions decoded.

     p6-br-inst-exec
             (Pentium M) Count the number of branch instructions executed but
             necessarily retired.

     p6-br-inst-retired
             Count the number of branch instructions retired.

     p6-br-miss-pred-retired
             Count the number of mispredicted branch instructions retired.

     p6-br-miss-pred-taken-ret
             Count the number of taken mispredicted branches retired.

     p6-br-missp-exec
             (Pentium M) Count the number of branch instructions executed that
             were mispredicted at execution.

     p6-br-ret-bac-missp-exec
             (Pentium M) Count the number of return instructions executed that
             were mispredicted at the Front End (BAC).

     p6-br-ret-exec
             (Pentium M) Count the number of return instructions executed.

     p6-br-ret-missp-exec
             (Pentium M) Count the number of return instructions executed that
             were mispredicted at execution.

     p6-br-taken-retired
             Count the number of taken branches retired.

     p6-btb-misses
             Count the number of branches for which the BTB did not produce a
             prediction.

     p6-bus-bnr-drv
             Count the number of bus clock cycles during which this processor
             is driving the BNR# pin.

     p6-bus-data-rcv
             Count the number of bus clock cycles during which this processor
             is receiving data.

     p6-bus-drdy-clocks [,umask=qualifier]
             Count the number of clocks during which DRDY# is asserted.  An
             additional qualifier may be specified, and comprises one of the
             following keywords:

             any     Count transactions generated by any agent on the bus.
             self    Count transactions generated by this processor.

             The default is to count operations generated by this processor.

     p6-bus-hit-drv
             Count the number of bus clock cycles during which this processor
             is driving the HIT# pin.

     p6-bus-hitm-drv
             Count the number of bus clock cycles during which this processor
             is driving the HITM# pin.

     p6-bus-lock-clocks [,umask=qualifier]
             Count the number of clocks during with LOCK# is asserted on the
             external system bus.  An additional qualifier may be specified
             and comprises one of the following keywords:

             any     Count transactions generated by any agent on the bus.
             self    Count transactions generated by this processor.

             The default is to count operations generated by this processor.

     p6-bus-req-outstanding
             Count the number of bus requests outstanding in any given cycle.

     p6-bus-snoop-stall
             Count the number of clock cycles during which the bus is snoop
             stalled.

     p6-bus-tran-any [,umask=qualifier]
             Count the number of completed bus transactions of any kind.  An
             additional qualifier may be specified and comprises one of the
             following keywords:

             any     Count transactions generated by any agent on the bus.
             self    Count transactions generated by this processor.

             The default is to count operations generated by this processor.

     p6-bus-tran-brd [,umask=qualifier]
             Count the number of burst read transactions.  An additional
             qualifier may be specified and comprises one of the following
             keywords:

             any     Count transactions generated by any agent on the bus.
             self    Count transactions generated by this processor.

             The default is to count operations generated by this processor.

     p6-bus-tran-burst [,umask=qualifier]
             Count the number of completed burst transactions.  An additional
             qualifier may be specified and comprises one of the following
             keywords:

             any     Count transactions generated by any agent on the bus.
             self    Count transactions generated by this processor.

             The default is to count operations generated by this processor.

     p6-bus-tran-def [,umask=qualifier]
             Count the number of completed deferred transactions.  An
             additional qualifier may be specified and comprises one of the
             following keywords:

             any     Count transactions generated by any agent on the bus.
             self    Count transactions generated by this processor.

             The default is to count operations generated by this processor.

     p6-bus-tran-ifetch [,umask=qualifier]
             Count the number of completed instruction fetch transactions.  An
             additional qualifier may be specified and comprises one of the
             following keywords:

             any     Count transactions generated by any agent on the bus.
             self    Count transactions generated by this processor.

             The default is to count operations generated by this processor.

     p6-bus-tran-inval [,umask=qualifier]
             Count the number of completed invalidate transactions.  An
             additional qualifier may be specified and comprises one of the
             following keywords:

             any     Count transactions generated by any agent on the bus.
             self    Count transactions generated by this processor.

             The default is to count operations generated by this processor.

     p6-bus-tran-mem [,umask=qualifier]
             Count the number of completed memory transactions.  An additional
             qualifier may be specified and comprises one of the following
             keywords:

             any     Count transactions generated by any agent on the bus.
             self    Count transactions generated by this processor.

             The default is to count operations generated by this processor.

     p6-bus-tran-pwr [,umask=qualifier]
             Count the number of completed partial write transactions.  An
             additional qualifier may be specified and comprises one of the
             following keywords:

             any     Count transactions generated by any agent on the bus.
             self    Count transactions generated by this processor.

             The default is to count operations generated by this processor.

     p6-bus-tran-rfo [,umask=qualifier]
             Count the number of completed read-for-ownership transactions.
             An additional qualifier may be specified and comprises one of the
             following keywords:

             any     Count transactions generated by any agent on the bus.
             self    Count transactions generated by this processor.

             The default is to count operations generated by this processor.

     p6-bus-trans-io [,umask=qualifier]
             Count the number of completed I/O transactions.  An additional
             qualifier may be specified and comprises one of the following
             keywords:

             any     Count transactions generated by any agent on the bus.
             self    Count transactions generated by this processor.

             The default is to count operations generated by this processor.

     p6-bus-trans-p [,umask=qualifier]
             Count the number of completed partial transactions.  An
             additional qualifier may be specified and comprises one of the
             following keywords:

             any     Count transactions generated by any agent on the bus.
             self    Count transactions generated by this processor.

             The default is to count operations generated by this processor.

     p6-bus-trans-wb [,umask=qualifier]
             Count the number of completed write-back transactions.  An
             additional qualifier may be specified and comprises one of the
             following keywords:

             any     Count transactions generated by any agent on the bus.
             self    Count transactions generated by this processor.

             The default is to count operations generated by this processor.

     p6-cpu-clk-unhalted
             Count the number of cycles during with the processor was not
             halted.

             (Pentium M) Count the number of cycles during with the processor
             was not halted and not in a thermal trip.

     p6-cycles-div-busy
             Count the number of cycles during which the divider is busy and
             cannot accept new divides.  This event is only allocated on
             counter 0.

     p6-cycles-in-pending-and-masked
             Count the number of processor cycles for which interrupts were
             disabled and interrupts were pending.

     p6-cycles-int-masked
             Count the number of processor cycles for which interrupts were
             disabled.

     p6-data-mem-refs
             Count all loads and all stores using any memory type, including
             internal retries.  Each part of a split store is counted
             separately.

     p6-dcu-lines-in
             Count the total lines allocated in the data cache unit.

     p6-dcu-m-lines-in
             Count the number of M state lines allocated in the data cache
             unit.

     p6-dcu-m-lines-out
             Count the number of M state lines evicted from the data cache
             unit.

     p6-dcu-miss-outstanding
             Count the weighted number of cycles while a data cache unit miss
             is outstanding, incremented by the number of outstanding cache
             misses at any time.

     p6-div  Count the number of floating point multiplies.  This event is
             only allocated on counter 1.

     p6-emon-esp-uops
             (Pentium M) Count the total number of micro-ops.

     p6-emon-est-trans [,umask=qualifier]
             (Pentium M) Count the number of Enhanced Intel SpeedStep
             transitions.  An additional qualifier may be specified, and can
             be one of the following keywords:

             all     Count all transitions.
             freq    Count only frequency transitions.

             The default is to count all transitions.

     p6-emon-fused-uops-ret [,umask=qualifier]
             (Pentium M) Count the number of retired fused micro-ops.  An
             additional qualifier may be specified, and may be one of the
             following keywords:

             all     Count all fused micro-ops.
             loadop  Count only load and op micro-ops.
             stdsta  Count only STD/STA micro-ops.

             The default is to count all fused micro-ops.

     p6-emon-kni-comp-inst-ret
             (Pentium III) Count the number of SSE computational instructions
             retired.  An additional qualifier may be specified, and comprises
             one of the following keywords:

             packed-and-scalar
                     Count packed and scalar operations.
             scalar  Count scalar operations only.

             The default is to count packed and scalar operations.

     p6-emon-kni-inst-retired [,umask=qualifier]
             (Pentium III) Count the number of SSE instructions retired.  An
             additional qualifier may be specified, and comprises one of the
             following keywords:

             packed-and-scalar
                     Count packed and scalar operations.
             scalar  Count scalar operations only.

             The default is to count packed and scalar operations.

     p6-emon-kni-pref-dispatched [,umask=qualifier]
             (Pentium III) Count the number of SSE prefetch or weakly ordered
             instructions dispatched (including speculative prefetches).  An
             additional qualifier may be specified, and comprises one of the
             following keywords:

             nta     Count non-temporal prefetches.
             t1      Count prefetches to L1.
             t2      Count prefetches to L2.
             wos     Count weakly ordered stores.

             The default is to count non-temporal prefetches.

     p6-emon-kni-pref-miss [,umask=qualifier]
             (Pentium III) Count the number of prefetch or weakly ordered
             instructions that miss all caches.  An additional qualifier may
             be specified, and comprises one of the following keywords:

             nta     Count non-temporal prefetches.
             t1      Count prefetches to L1.
             t2      Count prefetches to L2.
             wos     Count weakly ordered stores.

             The default is to count non-temporal prefetches.

     p6-emon-pref-rqsts-dn
             (Pentium M) Count the number of downward prefetches issued.

     p6-emon-pref-rqsts-up
             (Pentium M) Count the number of upward prefetches issued.

     p6-emon-simd-instr-retired
             (Pentium M) Count the number of retired MMX instructions.

     p6-emon-sse-sse2-comp-inst-retired [,umask=qualifier]
             (Pentium M) Count the number of computational SSE instructions
             retired.  An additional qualifier may be specified and can be one
             of the following keywords:

             sse-packed-single
                     Count SSE packed-single instructions.
             sse-scalar-single
                     Count SSE scalar-single instructions.
             sse2-packed-double
                     Count SSE2 packed-double instructions.
             sse2-scalar-double
                     Count SSE2 scalar-double instructions.

             The default is to count SSE packed-single instructions.

     p6-emon-sse-sse2-inst-retired [,umask=qualifer]

             (Pentium M) Count the number of SSE instructions retired.  An
             additional qualifier can be specified, and can be one of the
             following keywords:

             sse-packed-single
                     Count SSE packed-single instructions.
             sse-packed-single-scalar-single
                     Count SSE packed-single and scalar-single instructions.
             sse2-packed-double
                     Count SSE2 packed-double instructions.
             sse2-scalar-double
                     Count SSE2 scalar-double instructions.

             The default is to count SSE packed-single instructions.

     p6-emon-synch-uops
             (Pentium M) Count the number of sync micro-ops.

     p6-emon-thermal-trip
             (Pentium M) Count the duration or occurrences of thermal trips.
             Use the ``edge'' qualifier to count occurrences of thermal trips.

     p6-emon-unfusion
             (Pentium M) Count the number of unfusion events in the reorder
             buffer.

     p6-flops
             Count the number of computational floating point operations
             retired.  This event is only allocated on counter 0.

     p6-fp-assist
             Count the number of floating point exceptions handled by
             microcode.  This event is only allocated on counter 1.

     p6-fp-comps-ops-exe
             Count the number of computation floating point operations
             executed.  This event is only allocated on counter 0.

     p6-fp-mmx-trans [,umask=qualifier]
             (Pentium II, Pentium III) Count the number of transitions between
             MMX and floating-point instructions.  An additional qualifier may
             be specified, and comprises one of the following keywords:

             mmxtofp
                     Count transitions from MMX instructions to floating-point
                     instructions.
             fptommx
                     Count transitions from floating-point instructions to MMX
                     instructions.

             The default is to count MMX to floating-point transitions.

     p6-hw-int-rx
             Count the number of hardware interrupts received.

     p6-ifu-fetch
             Count the number of instruction fetches, both cacheable and non-
             cacheable.

     p6-ifu-fetch-miss
             Count the number of instruction fetch misses (i.e., those that
             produce memory accesses).

     p6-ifu-mem-stall
             Count the number of cycles instruction fetch is stalled for any
             reason.

     p6-ild-stall
             Count the number of cycles the instruction length decoder is
             stalled.

     p6-inst-decoded
             Count the number of instructions decoded.

     p6-inst-retired
             Count the number of instructions retired.

     p6-itlb-miss
             Count the number of instruction TLB misses.

     p6-l2-ads
             Count the number of L2 address strobes.

     p6-l2-dbus-busy
             Count the number of cycles during which the L2 cache data bus was
             busy.

     p6-l2-dbus-busy-rd
             Count the number of cycles during which the L2 cache data bus was
             busy transferring read data from L2 to the processor.

     p6-l2-ifetch [,umask=qualifier]
             Count the number of L2 instruction fetches.  An additional
             qualifier may be specified and comprises a list of the following
             keywords separated by `+' characters:

             e       Count operations affecting E (exclusive) state lines.
             i       Count operations affecting I (invalid) state lines.
             m       Count operations affecting M (modified) state lines.
             s       Count operations affecting S (shared) state lines.

             The default is to count operations affecting all (MESI) state
             lines.

     p6-l2-ld [,umask=qualifier]
             Count the number of L2 data loads.  An additional qualifier may
             be specified and comprises a list of the following keywords
             separated by `+' characters:

             both    (Pentium M) Count both hardware-prefetched lines and non-
                     hardware-prefetched lines.
             e       Count operations affecting E (exclusive) state lines.
             hw      (Pentium M) Count hardware-prefetched lines only.
             i       Count operations affecting I (invalid) state lines.
             m       Count operations affecting M (modified) state lines.
             nonhw   (Pentium M) Exclude hardware-prefetched lines.
             s       Count operations affecting S (shared) state lines.

             The default on processors other than Pentium M processors is to
             count operations affecting all (MESI) state lines.  The default
             on Pentium M processors is to count both hardware-prefetched and
             non-hardware-prefetch operations on all (MESI) state lines.
             (Errata) This event is affected by processor errata E53.

     p6-l2-lines-in [,umask=qualifier]
             Count the number of L2 lines allocated.  An additional qualifier
             may be specified and comprises a list of the following keywords
             separated by `+' characters:

             both    (Pentium M) Count both hardware-prefetched lines and non-
                     hardware-prefetched lines.
             e       Count operations affecting E (exclusive) state lines.
             hw      (Pentium M) Count hardware-prefetched lines only.
             i       Count operations affecting I (invalid) state lines.
             m       Count operations affecting M (modified) state lines.
             nonhw   (Pentium M) Exclude hardware-prefetched lines.
             s       Count operations affecting S (shared) state lines.

             The default on processors other than Pentium M processors is to
             count operations affecting all (MESI) state lines.  The default
             on Pentium M processors is to count both hardware-prefetched and
             non-hardware-prefetch operations on all (MESI) state lines.
             (Errata) This event is affected by processor errata E45.

     p6-l2-lines-out [,umask=qualifier]
             Count the number of L2 lines evicted.  An additional qualifier
             may be specified and comprises a list of the following keywords
             separated by `+' characters:

             both    (Pentium M) Count both hardware-prefetched lines and non-
                     hardware-prefetched lines.
             e       Count operations affecting E (exclusive) state lines.
             hw      (Pentium M) Count hardware-prefetched lines only.
             i       Count operations affecting I (invalid) state lines.
             m       Count operations affecting M (modified) state lines.
             nonhw   (Pentium M only) Exclude hardware-prefetched lines.
             s       Count operations affecting S (shared) state lines.

             The default on processors other than Pentium M processors is to
             count operations affecting all (MESI) state lines.  The default
             on Pentium M processors is to count both hardware-prefetched and
             non-hardware-prefetch operations on all (MESI) state lines.
             (Errata) This event is affected by processor errata E45.

     p6-l2-m-lines-inm
             Count the number of modified lines allocated in L2 cache.

     p6-l2-m-lines-outm [,umask=qualifier]
             Count the number of L2 M-state lines evicted.

             (Pentium M) On these processors an additional qualifier may be
             specified and comprises a list of the following keywords
             separated by `+' characters:

             both    Count both hardware-prefetched lines and non-hardware-
                     prefetched lines.
             hw      Count hardware-prefetched lines only.
             nonhw   Exclude hardware-prefetched lines.

             The default is to count both hardware-prefetched and non-
             hardware-prefetch operations.  (Errata) This event is affected by
             processor errata E53.

     p6-l2-rqsts [,umask=qualifier]
             Count the total number of L2 requests.  An additional qualifier
             may be specified and comprises a list of the following keywords
             separated by `+' characters:

             e       Count operations affecting E (exclusive) state lines.
             i       Count operations affecting I (invalid) state lines.
             m       Count operations affecting M (modified) state lines.
             s       Count operations affecting S (shared) state lines.

             The default is to count operations affecting all (MESI) state
             lines.

     p6-l2-st
             Count the number of L2 data stores.  An additional qualifier may
             be specified and comprises a list of the following keywords
             separated by `+' characters:

             e       Count operations affecting E (exclusive) state lines.
             i       Count operations affecting I (invalid) state lines.
             m       Count operations affecting M (modified) state lines.
             s       Count operations affecting S (shared) state lines.

             The default is to count operations affecting all (MESI) state
             lines.

     p6-ld-blocks
             Count the number of load operations delayed due to store buffer
             blocks.

     p6-misalign-mem-ref
             Count the number of misaligned data memory references (crossing a
             64 bit boundary).

     p6-mmx-assist
             (Pentium II, Pentium III) Count the number of MMX assists
             executed.

     p6-mmx-instr-exec
             (Celeron, Pentium II) Count the number of MMX instructions
             executed, except MOVQ and MOVD stores from register to memory.

     p6-mmx-instr-ret
             (Pentium II) Count the number of MMX instructions retired.

     p6-mmx-instr-type-exec [,umask=qualifier]
             (Pentium II, Pentium III) Count the number of MMX instructions
             executed.  An additional qualifier may be specified and comprises
             a list of the following keywords separated by `+' characters:

             pack    Count MMX pack operation instructions.
             packed-arithmetic
                     Count MMX packed arithmetic instructions.
             packed-logical
                     Count MMX packed logical instructions.
             packed-multiply
                     Count MMX packed multiply instructions.
             packed-shift
                     Count MMX packed shift instructions.
             unpack  Count MMX unpack operation instructions.

             The default is to count all operations.

     p6-mmx-sat-instr-exec
             (Pentium II, Pentium III) Count the number of MMX saturating
             instructions executed.

     p6-mmx-uops-exec
             (Pentium II, Pentium III) Count the number of MMX micro-ops
             executed.

     p6-mul  Count the number of floating point multiplies.  This event is
             only allocated on counter 1.

     p6-partial-rat-stalls
             Count the number of cycles or events for partial stalls.

     p6-resource-stalls
             Count the number of cycles there was a resource related stall of
             any kind.

     p6-ret-seg-renames
             (Pentium II, Pentium III) Count the number of segment register
             rename events retired.

     p6-sb-drains
             Count the number of cycles the store buffer is draining.

     p6-seg-reg-renames [,umask=qualifier]
             (Pentium II, Pentium III) Count the number of segment register
             renames.  An additional qualifier may be specified, and comprises
             a list of the following keywords separated by `+' characters:

             ds      Count renames for segment register DS.
             es      Count renames for segment register ES.
             fs      Count renames for segment register FS.
             gs      Count renames for segment register GS.

             The default is to count operations affecting all segment
             registers.

     p6-seg-rename-stalls
             (Pentium II, Pentium III) Count the number of segment register
             renaming stalls.  An additional qualifier may be specified, and
             comprises a list of the following keywords separated by `+'
             characters:

             ds      Count stalls for segment register DS.
             es      Count stalls for segment register ES.
             fs      Count stalls for segment register FS.
             gs      Count stalls for segment register GS.

             The default is to count operations affecting all the segment
             registers.

     p6-segment-reg-loads
             Count the number of segment register loads.

     p6-uops-retired
             Count the number of micro-ops retired.

   Intel P4 PMCS
     Intel P4 PMCs are present in Intel Pentium 4 and Xeon processors.  These
     PMCs are documented in Volume 3: System Programming Guide, IA-32 Intel(R)
     Architecture Software Developer's Manual, Order Number 245472-012, Intel
     Corporation, 2003.  Further information about using these PMCs may be
     found in IA-32 Intel(R) Architecture Optimization Guide, Order Number
     248966-009, Intel Corporation, 2003.  Some of these events are affected
     by processor errata described in Intel(R) Pentium(R) 4 Processor
     Specification Update, Document Number: 249199-059, Intel Corporation,
     April 2005.

     Event specifiers for Intel P4 PMCs can have the following common
     qualifiers:

     active=choice
             (On P4 HTT CPUs) Filter event counting based on which logical
             processors are active.  The allowed values of choice are:

             any     Count when either logical processor is active.
             both    Count when both logical processors are active.
             none    Count only when neither logical processor is active.
             single  Count only when one logical processor is active.

             The default is ``both''.

     cascade
             Configure the PMC to cascade onto its partner.  See Cascading P4
             PMCs below for more information.

     edge    Configure the counter to count false to true transitions of the
             threshold comparision output.  This qualifier only takes effect
             if a threshold qualifier has also been specified.

     complement
             Configure the counter to increment only when the event count seen
             is less than the threshold qualifier value specified.

     mask=qualifier
             Many event specifiers for Intel P4 PMCs need to be additionally
             qualified using a mask qualifier.  The allowed syntax for these
             qualifiers is event specific and is described along with the
             events.

     os      Configure the PMC to count when the CPL of the processor is 0.

     precise
             Select precise event based sampling.  Precise sampling is
             supported by the hardware for a limited set of events.

     tag=value
             Configure the PMC to tag the internal uop selected by the other
             fields in this event specifier with value value.  This feature is
             used when cascading PMCs.

     threshold=value
             Configure the PMC to increment only when the event counts seen
             are greater than the specified threshold value value.

     usr     Configure the PMC to count when the CPL of the processor is 1, 2
             or 3.

     If neither of the ``os'' or ``usr'' qualifiers are specified, the default
     is to enable both.

     On Intel Pentium 4 processors with HTT, events are divided into two
     classes:

     TS Events
             are those where hardware can differentiate between events
             generated on one logical processor from those generated on the
             other.
     TI Events
             are those where hardware cannot differentiate between events
             generated by multiple logical processors in a package.

     Only TS events are allowed for use with process-mode PMCs on
     Pentium-4/HTT CPUs.

     The event specifiers supported by Intel P4 PMCs are:

     p4-128bit-mmx-uop [,mask=flags]
             (TI event) Count integer SIMD SSE2 instructions that operate on
             128 bit SIMD operands.  Qualifier flags can take the following
             value (which is also the default):

             all     Count all uops operating on 128 bit SIMD integer operands
                     in memory or XMM register.

             If an instruction contains more than one 128 bit MMX uop, then
             each uop will be counted.

     p4-64bit-mmx-uop [,mask=flags]
             (TI event) Count MMX instructions that operate on 64 bit SIMD
             operands.  Qualifier flags can take the following value (which is
             also the default):

             all     Count all uops operating on 64 bit SIMD integer operands
                     in memory or in MMX registers.

             If an instruction contains more than one 64 bit MMX uop, then
             each uop will be counted.

     p4-b2b-cycles
             (TI event) Count back-to-back bys cycles.  Further documentation
             for this event is unavailable.

     p4-bnr  (TI event) Count bus-not-ready conditions.  Further documentation
             for this event is unavailable.

     p4-bpu-fetch-request [,mask=qualifier]
             (TS event) Count instruction fetch requests qualified by
             additional flags specified in qualifier.  At this point only one
             flag is supported:

             tcmiss  Count trace cache lookup misses.

             The default qualifier is also ``mask=tcmiss''.

     p4-branch-retired [,mask=flags]
             (TS event) Counts retired branches.  Qualifier flags is a list of
             the following `+' separated strings:

             mmnp    Count branches not-taken and predicted.
             mmnm    Count branches not-taken and mis-predicted.
             mmtp    Count branches taken and predicted.
             mmtm    Count branches taken and mis-predicted.

             The default qualifier counts all four kinds of branches.

     p4-bsq-active-entries [,mask=qualifier]
             (TS event) Count the number of entries (clipped at 15) currently
             active in the BSQ.  Qualifier qualifier is a `+' separated set of
             the following flags:

             req-type0, req-type1
                     Forms a 2-bit number used to select the request type
                     encoding:

                     0       reads excluding read invalidate
                     1       read invalidates
                     2       writes other than writebacks
                     3       writebacks

                     Bit ``req-type1'' is the MSB for this two bit number.
             req-len0, req-len1
                     Forms a two-bit number that specifies the request length
                     encoding:

                     0       0 chunks
                     1       1 chunk
                     3       8 chunks

                     Bit ``req-len1'' is the MSB for this two bit number.
             req-io-type
                     Count requests that are input or output requests.
             req-lock-type
                     Count requests that lock the bus.
             req-lock-cache
                     Count requests that lock the cache.
             req-split-type
                     Count requests that is a bus 8-byte chunk that is split
                     across an 8-byte boundary.
             req-dem-type
                     Count requests that are demand (not prefetches) if set.
                     Count requests that are prefetches if not set.
             req-ord-type
                     Count requests that are ordered.
             mem-type0, mem-type1, mem-type2
                     Forms a 3-bit number that specifies a memory type
                     encoding:

                     0       UC
                     1       USWC
                     4       WT
                     5       WP
                     6       WB

                     Bit ``mem-type2'' is the MSB of this 3-bit number.

             The default qualifier has all the above bits set.

             Edge triggering using the ``edge'' qualifier should not be used
             with this event when counting cycles.

     p4-bsq-allocation [,mask=qualifier]
             (TS event) Count allocations in the bus sequence unit according
             to the flags specified in qualifier, which is a `+' separated set
             of the following flags:

             req-type0, req-type1
                     Forms a 2-bit number used to select the request type
                     encoding:

                     0       reads excluding read invalidate
                     1       read invalidates
                     2       writes other than writebacks
                     3       writebacks

                     Bit ``req-type1'' is the MSB for this two bit number.
             req-len0, req-len1
                     Forms a two-bit number that specifies the request length
                     encoding:

                     0       0 chunks
                     1       1 chunk
                     3       8 chunks

                     Bit ``req-len1'' is the MSB for this two bit number.
             req-io-type
                     Count requests that are input or output requests.
             req-lock-type
                     Count requests that lock the bus.
             req-lock-cache
                     Count requests that lock the cache.
             req-split-type
                     Count requests that is a bus 8-byte chunk that is split
                     across an 8-byte boundary.
             req-dem-type
                     Count requests that are demand (not prefetches) if set.
                     Count requests that are prefetches if not set.
             req-ord-type
                     Count requests that are ordered.
             mem-type0, mem-type1, mem-type2
                     Forms a 3-bit number that specifies a memory type
                     encoding:

                     0       UC
                     1       USWC
                     4       WT
                     5       WP
                     6       WB

                     Bit ``mem-type2'' is the MSB of this 3-bit number.

             The default qualifier has all the above bits set.

             This event is usually used along with the ``edge'' qualifier to
             avoid multiple counting.

     p4-bsq-cache-reference [,mask=qualifier]
             (TS event) Count cache references as seen by the bus unit (2nd or
             3rd level cache references).  Qualifier qualifier is a `+'
             separated list of the following keywords:

             rd-2ndl-hits
                     Count 2nd level cache hits in the shared state.
             rd-2ndl-hite
                     Count 2nd level cache hits in the exclusive state.
             rd-2ndl-hitm
                     Count 2nd level cache hits in the modified state.
             rd-3rdl-hits
                     Count 3rd level cache hits in the shared state.
             rd-3rdl-hite
                     Count 3rd level cache hits in the exclusive state.
             rd-3rdl-hitm
                     Count 3rd level cache hits in the modified state.
             rd-2ndl-miss
                     Count 2nd level cache misses.
             rd-3rdl-miss
                     Count 3rd level cache misses.
             wr-2ndl-miss
                     Count write-back lookups from the data access cache that
                     miss the 2nd level cache.

             The default is to count all the above events.

     p4-execution-event [,mask=flags]
             (TS event) Count the retirement of tagged uops selected through
             the execution tagging mechanism.  Qualifier flags can contain the
             following strings separated by `+' characters:

             nbogus0, nbogus1, nbogus2, nbogus3
                     The marked uops are not bogus.
             bogus0, bogus1, bogus2, bogus3
                     The marked uops are bogus.

             This event requires additional (upstream) events to be allocated
             to perform the desired uop tagging.  The default is to set all
             the above flags.  This event can be used for precise event based
             sampling.

     p4-front-end-event [,mask=flags]
             (TS event) Count the retirement of tagged uops selected through
             the front-end tagging mechanism.  Qualifier flags can contain the
             following strings separated by `+' characters:

             nbogus  The marked uops are not bogus.
             bogus   The marked uops are bogus.

             This event requires additional (upstream) events to be allocated
             to perform the desired uop tagging.  The default is to select
             both kinds of events.  This event can be used for precise event
             based sampling.

     p4-fsb-data-activity [,mask=flags]
             (TI event) Count each DBSY or DRDY event selected by qualifier
             flags.  Qualifier flags is a `+' separated set of the following
             flags:

             drdy-drv
                     Count when this processor is driving data onto the bus.
             drdy-own
                     Count when this processor is reading data from the bus.
             drdy-other
                     Count when data is on the bus but not being sampled by
                     this processor.
             dbsy-drv
                     Count when this processor reserves the bus for use in the
                     next cycle in order to drive data.
             dbsy-own
                     Count when some agent reserves the bus for use in the
                     next bus cycle to drive data that this processor will
                     sample.
             dbsy-other
                     Count when some agent reserves the bus for use in the
                     next bus cycle to drive data that this processor will not
                     sample.

             Flags ``drdy-own'' and ``drdy-other'' are mutually exclusive.
             Flags ``dbsy-own'' and ``dbsy-other'' are mutually exclusive.
             The default value for qualifier is
             ``drdy-drv+drdy-own+dbsy-drv+dbsy-own''.

     p4-global-power-events [,mask=flags]
             (TS event) Count cycles during which the processor is not
             stopped.  Qualifier flags can take the following value (which is
             also the default):

             running
                     Count cycles when the processor is active.

     p4-instr-retired [,mask=flags]
             (TS event) Count instructions retired during a clock cycle.
             Qualifer flags comprises of the following strings separated by
             `+' characters:

             nbogusntag
                     Count non-bogus instructions that are not tagged.
             nbogustag
                     Count non-bogus instructions that are tagged.
             bogusntag
                     Count bogus instructions that are not tagged.
             bogustag
                     Count bogus instructions that are tagged.

             The default qualifier counts all the above kinds of instructions.

     p4-ioq-active-entries [,mask=qualifier] [,busreqtype=req-type]
             (TS event) Count the number of entries (clipped at 15) in the IOQ
             that are active.  The event masks are specified by qualifier
             qualifier and req-type.

             Qualifier qualifier is a `+' separated set of the following
             flags:

             all-read
                     Count read entries.
             all-write
                     Count write entries.
             mem-uc  Count entries accessing uncacheable memory.
             mem-wc  Count entries accessing write-combining memory.
             mem-wt  Count entries accessing write-through memory.
             mem-wp  Count entries accessing write-protected memory
             mem-wb  Count entries accessing write-back memory.
             own     Count store requests driven by the processor (i.e., not
                     by other processors or by DMA).
             other   Count store requests driven by other processors or by
                     DMA.
             prefetch
                     Include hardware and software prefetch requests in the
                     count.

             The default value for qualifier is to enable all the above flags.

             The req-type qualifier is a 5-bit number can be additionally used
             to select a specific bus request type.  The default is 0.

             The ``edge'' qualifier should not be used when counting cycles
             with this event.  The exact behaviour of this event depends on
             the processor revision.

     p4-ioq-allocation [,mask=qualifier] [,busreqtype=req-type]
             (TS event) Count various types of transactions on the bus
             matching the flags set in qualifier and req-type.

             Qualifier qualifier is a `+' separated set of the following
             flags:

             all-read
                     Count read entries.
             all-write
                     Count write entries.
             mem-uc  Count entries accessing uncacheable memory.
             mem-wc  Count entries accessing write-combining memory.
             mem-wt  Count entries accessing write-through memory.
             mem-wp  Count entries accessing write-protected memory
             mem-wb  Count entries accessing write-back memory.
             own     Count store requests driven by the processor (i.e., not
                     by other processors or by DMA).
             other   Count store requests driven by other processors or by
                     DMA.
             prefetch
                     Include hardware and software prefetch requests in the
                     count.

             The default value for qualifier is to enable all the above flags.

             The req-type qualifier is a 5-bit number can be additionally used
             to select a specific bus request type.  The default is 0.

             The ``edge'' qualifier is normally used with this event to
             prevent multiple counting.  The exact behaviour of this event
             depends on the processor revision.

     p4-itlb-reference [mask=qualifier]
             (TS event) Count translations using the intruction translation
             look-aside buffer.  The qualifier argument is a list of the
             following strings separated by `+' characters.

             hit     Count ITLB hits.
             miss    Count ITLB misses.
             hit-uc  Count uncacheable ITLB hits.

             If no qualifier is specified the default is to count all the
             three kinds of ITLB translations.

     p4-load-port-replay [,mask=qualifier]
             (TS event) Count replayed events at the load port.  Qualifier
             qualifier can take on one value:

             split-ld
                     Count split loads.

             The default value for qualifier is ``split-ld''.

     p4-mispred-branch-retired [,mask=flags]
             (TS event) Count mispredicted IA-32 branch instructions.
             Qualifier flags can take the following value (which is also the
             default):

             nbogus  Count non-bogus retired branch instructions.

     p4-machine-clear [,mask=flags]
             (TS event) Count the number of pipeline clears seen by the
             processor.  Qualifer flags is a list of the following strings
             separated by `+' characters:

             clear   Count for a portion of the many cycles when the machine
                     is being cleared for any reason.
             moclear
                     Count machine clears due to memory ordering issues.
             smclear
                     Count machine clears due to self-modifying code.

             Use qualifier ``edge'' to get a count of occurrences of machine
             clears.  The default qualifier is ``clear''.

     p4-memory-cancel [,mask=event-list]
             (TS event) Count the cancelling of various kinds of requests in
             the data cache address control unit of the CPU.  The qualifier
             event-list is a list of the following strings separated by `+'
             characters:

             st-rb-full
                     Requests cancelled because no store request buffer was
                     available.
             64k-conf
                     Requests that conflict due to 64K aliasing.

             If event-list is not specified, then the default is to count both
             kinds of events.

     p4-memory-complete [,mask=event-list]
             (TS event) Count the completion of load split, store split,
             uncacheable split and uncacheable load operations selected by
             qualifier event-list.  The qualifier event-list is a `+'
             separated list of the following flags:

             lsc     Count load splits completed, excluding loads from
                     uncacheable or write-combining areas.
             ssc     Count any split stores completed.

             The default is to count both kinds of operations.

     p4-mob-load-replay [,mask=qualifier]
             (TS event) Count load replays triggered by the memory order
             buffer.  Qualifier qualifier can be a `+' separated list of the
             following flags:

             no-sta  Count replays because of unknown store addresses.
             no-std  Count replays because of unknown store data.
             partial-data
                     Count replays because of partially overlapped data
                     accesses between load and store operations.
             unalgn-addr
                     Count replays because of mismatches in the lower 4 bits
                     of load and store operations.

             The default qualifier is no-sta+no-std+partial-data+unalgn-addr.

     p4-packed-dp-uop [,mask=flags]
             (TI event) Count packed double-precision uops.  Qualifier flags
             can take the following value (which is also the default):

             all     Count all uops operating on packed double-precision
                     operands.

     p4-packed-sp-uop [,mask=flags]
             (TI event) Count packed single-precision uops.  Qualifier flags
             can take the following value (which is also the default):

             all     Count all uops operating on packed single-precision
                     operands.

     p4-page-walk-type [,mask=qualifier]
             (TI event) Count page walks performed by the page miss handler.
             Qualifier qualifier can be a `+' separated list of the following
             keywords:

             dtmiss  Count page walks for data TLB misses.
             itmiss  Count page walks for instruction TLB misses.

             The default value for qualifier is ``dtmiss+itmiss''.

     p4-replay-event [,mask=flags]
             (TS event) Count the retirement of tagged uops selected through
             the replay tagging mechanism.  Qualifier flags contains a `+'
             separated set of the following strings:

             nbogus  The marked uops are not bogus.
             bogus   The marked uops are bogus.

             This event requires additional (upstream) events to be allocated
             to perform the desired uop tagging.  The default qualifier counts
             both kinds of uops.  This event can be used for precise event
             based sampling.

     p4-resource-stall [,mask=flags]
             (TS event) Count the occurrence or latency of stalls in the
             allocator.  Qualifier flags can take the following value (which
             is also the default):

             sbfull  A stall due to the lack of store buffers.

     p4-response
             (TI event) Count different types of responses.  Further
             documentation on this event is not available.

     p4-retired-branch-type [,mask=flags]
             (TS event) Count branches retired.  Qualifier flags contains a
             `+' separated list of strings:

             conditional
                     Count conditional jumps.
             call    Count direct and indirect call branches.
             return  Count return branches.
             indirect
                     Count returns, indirect calls or indirect jumps.

             The default qualifier counts all the above branch types.

     p4-retired-mispred-branch-type [,mask=flags]
             (TS event) Count mispredicted branches retired.  Qualifier flags
             contains a `+' separated list of strings:

             conditional
                     Count conditional jumps.
             call    Count indirect call branches.
             return  Count return branches.
             indirect
                     Count returns, indirect calls or indirect jumps.

             The default qualifier counts all the above branch types.

     p4-scalar-dp-uop [,mask=flags]
             (TI event) Count the number of scalar double-precision uops.
             Qualifier flags can take the following value (which is also the
             default):

             all     Count the number of scalar double-precision uops.

     p4-scalar-sp-uop [,mask=flags]
             (TI event) Count the number of scalar single-precision uops.
             Qualifier flags can take the following value (which is also the
             default):

             all     Count all uops operating on scalar single-precision
                     operands.

     p4-snoop
             (TI event) Count snoop traffic.  Further documentation on this
             event is not available.

     p4-sse-input-assist [,mask=flags]
             (TI event) Count the number of times an assist is required to
             handle problems with the operands for SSE and SSE2 operations.
             Qualifier flags can take the following value (which is also the
             default):

             all     Count assists for all SSE and SSE2 uops.

     p4-store-port-replay [,mask=qualifier]
             (TS event) Count events replayed at the store port.  Qualifier
             qualifier can take on one value:

             split-st
                     Count split stores.

             The default value for qualifier is ``split-st''.

     p4-tc-deliver-mode [,mask=qualifier]
             (TI event) Count the duration in cycles of operating modes of the
             trace cache and decode engine.  The desired operating mode is
             selected by qualifier, which is a list of the following strings
             separated by `+' characters:

             DD      Both logical processors are in deliver mode.
             DB      Logical processor 0 is in deliver mode while logical
                     processor 1 is in build mode.
             DI      Logical processor 0 is in deliver mode while logical
                     processor 1 is halted, or in machine clear, or
                     transitioning to a long microcode flow.
             BD      Logical processor 0 is in build mode while logical
                     processor 1 is in deliver mode.
             BB      Both logical processors are in build mode.
             BI      Logical processor 0 is in build mode while logical
                     processor 1 is halted, or in machine clear or
                     transitioning to a long microcode flow.
             ID      Logical processor 0 is halted, or in machine clear or
                     transitioning to a long microcode flow while logical
                     processor 1 is in deliver mode.
             IB      Logical processor 0 is halted, or in machine clear or
                     transitioning to a long microcode flow while logical
                     processor 1 is in build mode.

             If there is only one logical processor in the processor package
             then the qualifier for logical processor 1 is ignored.  If no
             qualifier is specified, the default qualifier is
             ``DD+DB+DI+BD+BB+BI+ID+IB''.

     p4-tc-ms-xfer [,mask=flags]
             (TI event) Count the number of times uop delivery changed from
             the trace cache to MS ROM.  Qualifier flags can take the
             following value (which is also the default):

             cisc    Count TC to MS transfers.

     p4-uop-queue-writes [,mask=flags]
             (TS event) Count the number of valid uops written to the uop
             queue.  Qualifier flags is a list of the following strings,
             separated by `+' characters:

             from-tc-build
                     Count uops being written from the trace cache in build
                     mode.
             from-tc-deliver
                     Count uops being written from the trace cache in deliver
                     mode.
             from-rom
                     Count uops being written from microcode ROM.

             The default qualifier counts all the above kinds of uops.

     p4-uop-type [,mask=flags]
             (TS event) This event is used in conjunction with the front-end
             at-retirement mechanism to tag load and store uops.  Qualifer
             flags comprises the following strings separated by `+'
             characters:

             tagloads
                     Mark uops that are load operations.
             tagstores
                     Mark uops that are store operations.

             The default qualifier counts both kinds of uops.

     p4-uops-retired [,mask=flags]
             (TS event) Count uops retired during a clock cycle.  Qualifier
             flags comprises the following strings separated by `+'
             characters:

             nbogus  Count marked uops that are not bogus.
             bogus   Count marked uops that are bogus.

             The default qualifier counts both kinds of uops.

     p4-wc-buffer [,mask=flags]
             (TI event) Count write-combining buffer operations.  Qualifier
             flags contains the following strings separated by `+' characters:

             wcb-evicts
                     WC buffer evictions due to any cause.
             wcb-full-evict
                     WC buffer evictions due to no WC buffer being available.

             The default qualifer counts both kinds of evictions.

     p4-x87-assist [,mask=flags]
             (TS event) Count the retirement of x87 instructions that required
             special handling.  Qualifier flags contains the following strings
             separated by `+' characters:

             fpsu    Count instructions that saw an FP stack underflow.
             fpso    Count instructions that saw an FP stack overflow.
             poao    Count instructions that saw an x87 output overflow.
             poau    Count instructions that saw an x87 output underflow.
             prea    Count instructions that needed an x87 input assist.

             The default qualifier counts all the above types of instruction
             retirements.

     p4-x87-fp-uop [,mask=flags]
             (TI event) Count x87 floating-point uops.  Qualifier flags can
             take the following value (which is also the default):

             all     Count all x87 floating-point uops.

             If an instruction contains more than one x87 floating-point uops,
             then all x87 floating-point uops will be counted.  This event
             does not count x87 floating-point data movement operations.

     p4-x87-simd-moves-uop [,mask=flags]
             (TI event) Count each x87 FPU, MMX, SSE, or SSE2 uops that load
             data or store data or perform register-to-register moves.  This
             event does not count integer move uops.  Qualifier flags may
             contain the following keywords separated by `+' characters:

             allp0   Count all x87 and SIMD store and move uops.
             allp2   Count all x87 and SIMD load uops.

             The default is to count all uops.  (Errata) This event may be
             affected by processor errata N43.

   Cascading P4 PMCs
     PMC cascading support is currently poorly implemented.  While individual
     event counters may be allocated with a ``cascade'' qualifier, the current
     API does not offer the ability to name and allocate all the resources
     needed for a cascaded event counter pair in a single operation.

   Precise Event Based Sampling
     Support for precise event based sampling is currently unimplemented in
     hwpmc(4).

IMPLEMENTATION NOTES
     On the i386 architecture, FreeBSD has historically allowed the use of the
     RDTSC instruction from user-mode (i.e., at a processor CPL of 3) by any
     process.  This behaviour is preserved by hwpmc(4).

RETURN VALUES
     The pmc_name_of_capability(), pmc_name_of_class(), pmc_name_of_cputype(),
     pmc_name_of_disposition(), pmc_name_of_event(), pmc_name_of_mode(), and
     pmc_name_of_state() functions return a pointer to the human readable form
     of their argument.  These pointers may point to statically allocated
     storage and must not be passed to free().  In case of an error, these
     functions return NULL and set the global variable errno.

     The functions pmc_ncpu() and pmc_npmc() return the number of CPUs and
     number of PMCs configured respectively; in case of an error they return
     the value -1 and set the global variable errno.

     All other functions return the value 0 if successful; otherwise the value
     -1 is returned and the global variable errno is set to indicate the
     error.

COMPATIBILITY
     The interface between the pmc(3) library and the hwpmc(4) driver is
     intended to be private to the implementation and may change.  In order to
     ease forward compatibility with future versions of the hwpmc(4) driver,
     applications are urged to dynamically link with the pmc(3) library.

     The pmc(3) API is currently under development.

ERRORS
     A call to pmc_init() may fail with the following errors in addition to
     those returned by modfind(2), modstat(2) and hwpmc(4):

     [ENXIO]            An unknown CPU type was encountered during
                        initialization.

     [EPROGMISMATCH]    The version number of the hwpmc(4) kernel module did
                        not match that compiled into the pmc(3) library.

     A call to pmc_capabilities(), pmc_name_of_capability(),
     pmc_name_of_disposition(), pmc_name_of_state(), pmc_name_of_event(),
     pmc_name_of_mode() pmc_name_of_class() and pmc_width() may fail with the
     following error:

     [EINVAL]           An invalid argument was passed to the function.

     A call to pmc_cpuinfo() or pmc_ncpu() may fail with the following error:

     [ENXIO]            The pmc(3) has not been initialized.

     A call to pmc_npmc() may fail with the following errors:

     [EINVAL]           The argument passed in was out of range.

     [ENXIO]            The pmc(3) library has not been initialized.

     A call to pmc_pmcinfo() may fail with the following errors, in addition
     to those returned by hwpmc(4):

     [ENXIO]            The pmc(3) library is not yet initialized.

     A call to pmc_allocate() may fail with the following errors, in addition
     to those returned by hwpmc(4):

     [EINVAL]           The mode argument passed in had an illegal value, or
                        the event specification ctrspec was unrecognized for
                        this CPU type.

     Calls to pmc_attach(), pmc_configure_logfile(), pmc_detach(),
     pmc_disable(), pmc_enable(), pmc_get_driver_stats(), pmc_get_msr(),
     pmc_read(), pmc_release(), pmc_rw(), pmc_set(), pmc_start(), pmc_stop(),
     pmc_write(), and pmc_writelog() may fail with the errors described in
     hwpmc(4).

     If a log file was configured using pmc_configure_logfile() and the
     hwpmc(4) driver encountered an error while logging data to it, then
     logging will be stopped and a subsequent call to pmc_flush_logfile() will
     fail with the error code seen by the hwpmc(4) driver.

SEE ALSO
     modfind(2), modstat(2), calloc(3), pmclog(3), hwpmc(4), pmccontrol(8),
     pmcstat(8)

HISTORY
     The pmc(3) library first appeared in FreeBSD 6.0.

BUGS
     The information returned by pmc_cpuinfo(), pmc_ncpu() and possibly
     pmc_npmc() should really be available all the time, through a better
     designed interface and not just when hwpmc(4) is present in the kernel.

FreeBSD 11.0-PRERELEASE          June 24, 2005         FreeBSD 11.0-PRERELEASE

NAME | LIBRARY | SYNOPSIS | DESCRIPTION | EVENT SPECIFIERS | IMPLEMENTATION NOTES | RETURN VALUES | COMPATIBILITY | ERRORS | SEE ALSO | HISTORY | BUGS

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