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LOTRS(3)	       MBK LOGICAL STRUCTURE DEFINITIONS	      LOTRS(3)

NAME
       lotrs - mbk logical transistor

DESCRIPTION
       The  lotrs  is used to describe a logical transistor. It	is mostly used
       to describe leaf	cells in terms of transistors interconnections,	and as
       a  result  of  layout  extractions. Since the only target technology is
       CMOS, only NMOS and PMOS	transistors are	used.

       The declarations	needed to work on lotrs	are available  in  the	header
       file "/labo/include/mlo.h".

       The following C structure supports the description of the logical tran-
       sistor :
	      typedef struct lotrs {
		 struct	lotrs	  *NEXT;
		 struct	locon	  *DRAIN;
		 struct	locon	  *GRID;
		 struct	locon	  *SOURCE;
		 struct	locon	  *BULK;
		 char		  *TRNAME;
		 long		  X,Y;
		 unsigned short	  WIDTH, LENGTH;
		 unsigned short	  PS, PD;
		 unsigned short	  XS, XD;
		 char		  TYPE;
		 struct	ptype	  *USER;
	      }	lotrs_list;

       NEXT		   Pointer to the next lotrs of	the list.

       DRAIN		   Pointer to the drain	connector of  the  transistor.
			   This	 connector  is,	of course unique. See locon(3)
			   for details.

       GRID		   Pointer to the grid connector  of  the  transistor.
			   This	 connector  is,	of course unique. See locon(3)
			   for details.

       SOURCE		   Pointer to the source connector of the  transistor.
			   This	 connector  is,	of course unique. See locon(3)
			   for details.

       BULK		   Pointer to the bulk connector  of  the  transistor.
			   This	 connector  is,	of course unique. See locon(3)
			   for details.

       TRNAME		   Transistor instance name

       X, Y		   Coordinates of the transistor in  a	layout.	 These
			   informations	 have  sens  only  if  the  transistor
			   netlist is the result of a layout extraction.  They
			   are	otherwise  set to zero.	 These coordinates are
			   given in micron times  the  scale  factor  SCALE_X,
			   since the extracted view is technology dependant.

       WIDTH, LENGTH	   Respectivly	width  and  length  of	the transistor
			   grid.

       PS, PD		   Respectivly perimeter of the	source and  drain,  in
			   micron times	the scale factor SCALE_X.

       XS, XD		   These  values are needed to compute respectivly the
			   source and drain areas.  Let	As be the source  area
			   in square microns, and Width	be the transistor grid
			   width in micron, then lotrs-_XS  =  As  /  Width  *
			   SCALE_X

       TYPE		   Canal  type of the transistor. Six legal values are
			   available :

			   TRANSN	       N type MOS transistor

			   TRANSP	       P type MOS transistor

			   TRANSN_FAST	       High speed N type MOS  transis-
					       tor

			   TRANSP_FAST	       High  speed P type MOS transis-
					       tor

			   TRANSN_HVIO	       Low Leakage N type MOS transis-
					       tor

			   TRANSP_HVIO	       Low Leakage P type MOS transis-
					       tor

       USER		   Pointer to a	ptype list, see	ptype(3) for  details,
			   that	is a general purpose pointer used to share in-
			   formations on the transistor.

       Remark :		   In integrated techniques, NMOS transistor bulk  for
			   digital  circuits is	always set to ground, and PMOS
			   transistor bulk for digital circuits	is always  set
			   to positive supply.

SEE ALSO
       mbk(1), addlotrs(3), dellotrs(3), locon(3), lofig(3), ptype(3).

ASIM/LIP6			August 6, 2002			      LOTRS(3)

NAME | DESCRIPTION | SEE ALSO

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