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CHVGPIO(4)		 BSD Kernel Interfaces Manual		    CHVGPIO(4)

NAME
     chvgpio --	Intel Cherry View SoC GPIO controller

SYNOPSIS
     device gpio
     device chvgpio

DESCRIPTION
     chvgpio supports the GPIO controller that can be found in Intel's Cherry
     View SoC family.

     The Cherry	View SoC has 5 banks of	GPIO pins, NORTH, EAST,	SOUTHEAST,
     SOUTHWEST and VIRTUAL.  All but VIRTUAL are exposed to userland as
     /dev/gpiocN, where	N is 0-3.  Pins	in each	bank are pre-named to match
     names in the IntelA(R) Atomac Z8000 Processor Series Vol 2

SEE ALSO
     gpio(3), gpio(4), gpioctl(8)

     Intel_A(R) Atom_a_c Z8000 Processor Series Vol 1.

     Intel_A(R) Atom_a_c Z8000 Processor Series Vol 2.

HISTORY
     The chvgpio manual	page first appeared in FreeBSD 12.

AUTHORS
     This driver and man page were written by Tom Jones	<tj@enoti.me>.

BSD			       November	17, 2017			   BSD

NAME | SYNOPSIS | DESCRIPTION | SEE ALSO | HISTORY | AUTHORS

Want to link to this manual page? Use this URL:
<https://www.freebsd.org/cgi/man.cgi?query=chvgpio&manpath=FreeBSD+12.1-RELEASE+and+Ports>

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