CVS log for src/sys/i386/pci/pci_cfgreg.c
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Revision 1.136.2.1.2.1: download - view: text, markup, annotated - select for diffs
Fri Nov 11 04:20:22 2011 UTC (3 months ago) by kensmith
Branches: RELENG_9_0
CVS tags: RELENG_9_0_0_RELEASE
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SVN rev 227445 on 2011-11-11 04:20:22Z by kensmith Copy stable/9 to releng/9.0 as part of the FreeBSD 9.0-RELEASE release cycle. Approved by: re (implicit)
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Fri Sep 23 00:51:37 2011 UTC (4 months, 2 weeks ago) by kensmith
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SVN rev 225736 on 2011-09-23 00:51:37Z by kensmith Copy head to stable/9 as part of 9.0-RELEASE release cycle. Approved by: re (implicit)
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Tue May 31 15:11:43 2011 UTC (8 months, 1 week ago) by nwhitehorn
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SVN rev 222531 on 2011-05-31 15:11:43Z by nwhitehorn On multi-core, multi-threaded PPC systems, it is important that the threads be brought up in the order they are enumerated in the device tree (in particular, that thread 0 on each core be brought up first). The SLIST through which we loop to start the CPUs has all of its entries added with SLIST_INSERT_HEAD(), which means it is in reverse order of enumeration and so AP startup would always fail in such situations (causing a machine check or RTAS failure). Fix this by changing the SLIST into an STAILQ, and inserting new CPUs at the end. Reviewed by: jhb
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Tue Dec 21 17:10:29 2010 UTC (13 months, 2 weeks ago) by kensmith
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SVN rev 216618 on 2010-12-21 17:10:29Z by kensmith Copy stable/7 to releng/7.4 in preparation for FreeBSD-7.4 release. Approved by: re (implicit)
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Tue Dec 21 17:09:25 2010 UTC (13 months, 2 weeks ago) by kensmith
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SVN rev 216617 on 2010-12-21 17:09:25Z by kensmith Copy stable/8 to releng/8.2 in preparation for FreeBSD-8.2 release. Approved by: re (implicit)
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Mon Jun 14 02:09:06 2010 UTC (19 months, 4 weeks ago) by kensmith
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SVN rev 209145 on 2010-06-14 02:09:06Z by kensmith Copy stable/8 to releng/8.1 in preparation for 8.1-RC1. Approved by: re (implicit)
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Wed Feb 10 00:26:20 2010 UTC (2 years ago) by kensmith
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SVN rev 203736 on 2010-02-10 00:26:20Z by kensmith Copy stable/7 to releng/7.3 as part of the 7.3-RELEASE process. Approved by: re (implicit)
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Sun Nov 1 18:40:03 2009 UTC (2 years, 3 months ago) by avg
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SVN rev 198770 on 2009-11-01 18:40:03Z by avg MFC 197450: number of cleanups in i386 and amd64 pci md code
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Sun Nov 1 18:39:26 2009 UTC (2 years, 3 months ago) by avg
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SVN rev 198769 on 2009-11-01 18:39:26Z by avg MFC 197450: number of cleanups in i386 and amd64 pci md code
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Sun Oct 25 01:10:29 2009 UTC (2 years, 3 months ago) by kensmith
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SVN rev 198460 on 2009-10-25 01:10:29Z by kensmith Copy stable/8 to releng/8.0 as part of 8.0-RELEASE release procedure. Approved by: re (implicit)
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Thu Sep 24 07:11:23 2009 UTC (2 years, 4 months ago) by avg
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SVN rev 197450 on 2009-09-24 07:11:23Z by avg number of cleanups in i386 and amd64 pci md code o introduce PCIE_REGMAX and use it instead of ad-hoc constant o where 'reg' parameter/variable is not already unsigned, cast it to unsigned before comparison with maximum value to cut off negative values o use PCI_SLOTMAX in several places where 31 or 32 were explicitly used o drop redundant check of 'bytes' in i386 pciereg_cfgread() - valid values are already checked in the subsequent switch Reviewed by: jhb MFC after: 1 week
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Mon Aug 3 08:13:06 2009 UTC (2 years, 6 months ago) by kensmith
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SVN rev 196045 on 2009-08-03 08:13:06Z by kensmith Copy head to stable/8 as part of 8.0 Release cycle. Approved by: re (Implicit)
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Tue May 26 15:33:34 2009 UTC (2 years, 8 months ago) by jhb
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SVN rev 192813 on 2009-05-26 15:33:34Z by jhb MFC: Add a read-only sysctl hw.pci.mcfg to mirror the tunable by the same name.
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Mon May 18 21:47:32 2009 UTC (2 years, 8 months ago) by jhb
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SVN rev 192342 on 2009-05-18 21:47:32Z by jhb Add a read-only sysctl hw.pci.mcfg to mirror the tunable by the same name. MFC after: 1 week
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Mon May 4 21:04:29 2009 UTC (2 years, 9 months ago) by jhb
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SVN rev 191799 on 2009-05-04 21:04:29Z by jhb MFC: Expand the support for PCI-e memory mapped configuration space access. Note that unlike in HEAD, this defaults to off and must be explicitly enabled by setting the loader tunable hw.pci.mcfg=1. - Add support for the Intel 915GM chipsets by reading the BAR. - Add parsing of the ACPI MCFG table to discover memory mapped configuration access on modern machines. - Port the memory mapped config acess to amd64. On amd64 it uses the direct map. - For config requests to busses not listed in ACPI's min/max valid buses, fall back to using type #1 configuration access instead. - Add a workaround for some K8 chipsets that do not expose all devices on bus 0 via MCFG and fall back to type #1 for those devices instead.
Revision 1.124.2.2.6.1: download - view: text, markup, annotated - select for diffs
Wed Apr 15 03:14:26 2009 UTC (2 years, 9 months ago) by kensmith
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SVN rev 191087 on 2009-04-15 03:14:26Z by kensmith Create releng/7.2 from stable/7 in preparation for 7.2-RELEASE. Approved by: re (implicit)
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Tue Mar 24 18:10:22 2009 UTC (2 years, 10 months ago) by jhb
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SVN rev 190386 on 2009-03-24 18:10:22Z by jhb Fall back to using configuration type 1 accesses for PCI config requests if the requested PCI bus falls outside of the bus range given in the ACPI MCFG table. Several BIOSes seem to not include all of the PCI busses in systems in their MCFG tables. It maybe that the BIOS is simply buggy and does support all the busses, but it is more conservative to just fall back to the old method unless it is certain that memory accesses will work.
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Tue Nov 25 02:59:29 2008 UTC (3 years, 2 months ago) by kensmith
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SVN rev 185281 on 2008-11-25 02:59:29Z by kensmith Create releng/7.1 in preparation for moving into RC phase of 7.1 release cycle. Approved by: re (implicit)
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Thu Oct 2 02:57:24 2008 UTC (3 years, 4 months ago) by kensmith
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CVS tags: RELENG_6_4_0_RELEASE
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SVN rev 183531 on 2008-10-02 02:57:24Z by kensmith Create releng/6.4 from stable/6 in preparation for 6.4-RC1. Approved by: re (implicit)
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Thu Sep 11 21:42:11 2008 UTC (3 years, 5 months ago) by jhb
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SVN rev 182947 on 2008-09-11 21:42:11Z by jhb Add a 'hw.pci.mcfg' tunable. It can be set to 0 to disable memory-mapped PCI config access.
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Wed Sep 10 18:06:08 2008 UTC (3 years, 5 months ago) by jhb
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SVN rev 182910 on 2008-09-10 18:06:08Z by jhb Some K8 chipsets don't expose all of the PCI devices on bus 0 via PCIe memory-mapped config access. Add a workaround for these systems by checking the first function of each slot on bus 0 using both the memory-mapped config access and the older type 1 I/O port config access. If we find a slot that is only visible via the type 1 I/O port config access, we flag that slot. Future PCI config transactions to flagged slots on bus 0 use type 1 I/O port config access rather than memory mapped config access.
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Fri Aug 22 02:14:23 2008 UTC (3 years, 5 months ago) by jhb
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SVN rev 181987 on 2008-08-22 02:14:23Z by jhb Extend the support for PCI-e memory mapped configuration space access: - Rename pciereg_cfgopen() to pcie_cfgregopen() and expose it to the rest of the kernel. It now also accepts parameters via function arguments rather than global variables. - Add a notion of minimum and maximum bus numbers and reject requests for an out of range bus. - Add more range checks on slot/func/reg/bytes parameters to the cfg reg read/write routines. Don't panic on any invalid parameters, just fail the request (writes do nothing, reads return -1). This matches the behavior of the other cfg mechanisms. - Port the memory mapped configuration space access to amd64. On amd64 we simply use the direct map (via pmap_mapdev()) for the memory mapped window. - During acpi_attach() just after loading the ACPI tables, check for a MCFG table. If it exists, call pciereg_cfgopen() on each subtable (memory mapped window). For now we only support windows for domain 0 that start with bus 0. This removes the need for more chipset-specific quirks in the MD code. - Remove the chipset-specific quirks for the Intel 5000P/V/Z chipsets since these machines should all have MCFG tables via ACPI. - Updated pci_cfgregopen() to DTRT if ACPI had invoked pcie_cfgregopen() earlier. MFC after: 2 weeks
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Wed Aug 20 18:18:17 2008 UTC (3 years, 5 months ago) by jhb
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SVN rev 181933 on 2008-08-20 18:18:17Z by jhb - Add support for memory mapped PCI config space access on Intel 915GM and 5000P/V/Z chipsets. - If the base address of the config space BAR is above 4GB for some reason and this isn't a PAE kernel, then warn about this (under bootverbose) and don't use the BAR. PR: kern/126525 Submitted by: Arthur Hartwig @ Nokia MFC after: 2 weeks
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Wed Aug 20 17:50:59 2008 UTC (3 years, 5 months ago) by jhb
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SVN rev 181931 on 2008-08-20 17:50:59Z by jhb Use switch statements instead of if-else for enabling PCI-express config space support. MFC after: 1 week
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Fri Aug 15 20:51:31 2008 UTC (3 years, 5 months ago) by kmacy
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SVN rev 181775 on 2008-08-15 20:51:31Z by kmacy Integrate support for xen in to i386 common code. MFC after: 1 month
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Thu Dec 6 08:27:03 2007 UTC (4 years, 2 months ago) by jhb
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CVS tags: RELENG_6_3_0_RELEASE
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Changes since revision 1.116.2.1.4.1: +25 -25 lines
MFC: Always assume type #1 PCI config transactions for amd64 and relax the probe for type #1 on i386. Approved by: re (kensmith)
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Thu Dec 6 08:26:18 2007 UTC (4 years, 2 months ago) by jhb
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MFC: Always assume type #1 PCI config transactions for amd64 and relax the probe for type #1 on i386.
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Thu Dec 6 08:25:43 2007 UTC (4 years, 2 months ago) by jhb
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MFC: Always assume type #1 PCI config transactions for amd64 and relax the probe for type #1 on i386. Approved by: re (kensmith)
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Thu Dec 6 08:19:00 2007 UTC (4 years, 2 months ago) by jhb
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MFC: Change pci_cfgdisable() into a nop for type #1 similar to what other OSs do. Approved by: re (kensmith)
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Thu Dec 6 08:17:44 2007 UTC (4 years, 2 months ago) by jhb
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MFC: Change pci_cfgdisable() into a nop for type #1 similar to what other OSs do.
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Thu Dec 6 08:13:52 2007 UTC (4 years, 2 months ago) by jhb
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MFC: Change pci_cfgdisable() into a nop for type #1 similar to what other OSs do. Approved by: re (kensmith)
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Wed Nov 28 22:22:05 2007 UTC (4 years, 2 months ago) by jhb
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MFamd64: 1.109 of pci_cfgreg.c which changes pci_cfgdisable() into a nop for type #1 similar to what other OS's do. MFC after: 3 days
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Wed Nov 28 22:20:08 2007 UTC (4 years, 2 months ago) by jhb
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Adjust the code to probe for the PCI config mechanism to use. - On amd64, just assume type #1 is always used. PCI 2.0 mandated deprecated type #2 and required type #1 for all future bridges which was well before amd64 existed. - For i386, ignore whatever value was in 0xcf8 before testing for type #1 and instead rely on the other tests to determine if type #1 works. Some newer machines leave garbage in 0xcf8 during boot and as a result the kernel doesn't find PCI at all (which greatly confuses ACPI which expects PCI to exist when PCI busses are in the namespace). MFC after: 3 days Discussed with: scottl
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Tue Dec 12 19:23:52 2006 UTC (5 years, 2 months ago) by jhb
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Replace a few magic numbers.
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Tue Aug 22 16:52:42 2006 UTC (5 years, 5 months ago) by rink
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MFC: FreeBSD/xbox support, as per the patch posted to arch@ A kernel with 'options XBOX' will be bootable on a Microsoft Xbox (it will do nothing extra if booted on a non-xbox i386) The /sys/i386/conf/XBOX kernel configuration file contains a kernel with support for all XBOX peripherals. Approved by: imp (mentor) Reviewed by: arch@ (no objection)
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Thu Dec 8 18:55:15 2005 UTC (6 years, 2 months ago) by rodrigc
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Add support for 7320 and 915 PCIe chipsets. Submitted by: Gavin Atkinson <gavin.atkinson at ury dot york dot ac dot uk> PR: kern/79139 Reviewed by: scottl
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Mon Nov 14 00:43:44 2005 UTC (6 years, 2 months ago) by imp
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Provide a dummy NO_XBOX option that lives in opt_xbox.h for pc98. This allows us to eliminate a three ifdef PC98 instances.
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Wed Nov 9 12:22:26 2005 UTC (6 years, 3 months ago) by nyan
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Fix pc98 build.
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Wed Nov 9 03:55:40 2005 UTC (6 years, 3 months ago) by imp
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Add support for XBOX to the FreeBSD port. The xbox architecture is nearly identical to wintel/ia32, with a couple of tweaks. Since it is so similar to ia32, it is optionally added to a i386 kernel. This port is preliminary, but seems to work well. Further improvements will improve the interaction with syscons(4), port Linux nforce driver and future versions of the xbox. This supports the 64MB and 128MB boxes. You'll need the most recent CVS version of Cromwell (the Linux BIOS for the XBOX) to boot. Rink will be maintaining this port, and is interested in feedback. He's setup a website http://xbox-bsd.nl to report the latest developments. Any silly mistakes are my fault. Submitted by: Rink P.W. Springer rink at stack dot nl and Ed Schouten ed at fxq dot nl
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Fri Nov 4 22:53:44 2005 UTC (6 years, 3 months ago) by peter
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MFamd64: indent with tabs instead of spaces.
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Tue Oct 25 05:32:44 2005 UTC (6 years, 3 months ago) by wpaul
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Undo the change to pci_cfgdisable() on i386 for now. It seems to fix the amd64 case, but makes the i386 case fail even more often.
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Tue Oct 25 04:53:28 2005 UTC (6 years, 3 months ago) by wpaul
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Modify the pci_cfgdisable() routine to bring it more in line with other OSes (Solaris, Linux, VxWorks). It's not necessary to write a 0 to the config address register when using config mechanism 1 to turn off config access. In fact, it can be downright troublesome, since it seems to confuse the PCI-PCI bridge in the AMD8111 chipset and cause it to sporadically botch reads from some devices. This is the cause of the missing USP ports problem I was experiencing with my Sun Opteron system. Also correct the case for mechanism 2: it's only necessary to write a 0 to the ENABLE port.
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Mon Jan 31 23:26:07 2005 UTC (7 years ago) by imp
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MFC: /*- and related license changes
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Thu Jan 6 22:18:17 2005 UTC (7 years, 1 month ago) by imp
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/* -> /*- for copyright notices, minor format tweaks as necessary
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Mon Dec 13 07:08:44 2004 UTC (7 years, 1 month ago) by scottl
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Remove a stray critical_exit(). Submitted by: johan
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Fri Dec 10 15:44:12 2004 UTC (7 years, 2 months ago) by scottl
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Expand the scope of the critical section in the PCIe read and write methods on the advice of Alan Cox.
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Mon Dec 6 18:19:32 2004 UTC (7 years, 2 months ago) by scottl
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Due to a significant addition of code, add my copyright to this file. Also note that the PCIe work was made possible due to hardware donations from the FreeBSD Foundation and Intel. Thanks!
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Mon Dec 6 08:27:10 2004 UTC (7 years, 2 months ago) by scottl
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Diff to: previous 1.111: preferred, colored
Changes since revision 1.111: +211 -8 lines
Add support for the memory-mapped PCI Express configuration mechanism. This actually is a property of the northbridge and applies to all PCI/PCI-X/PCIe devices in the system, though only PCIe devices will respond to registers higher than 256. This uses per-CPU pools of temporary mappings so that the whole 256MB of configuration space doesn't have to be mapped all at once. While the sf_buf API was considered for this, the fact that it requires sleep locks and can return failure made it unsuitable for this use. For now only the Intel Grantsdale and Lindenhurst (925 and 752x) chipsets are supported. Since there doesn't appear to be a compatible way to determine northbridge support, new chipsets will have to be explicitely added in the future.
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Sun Jul 4 16:11:02 2004 UTC (7 years, 7 months ago) by stefanf
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CVS tags: RELENG_5_BP, RELENG_5_3_BP, RELENG_5_3_0_RELEASE, RELENG_5_3
Branch point for: RELENG_5
Diff to: previous 1.110: preferred, colored
Changes since revision 1.110: +1 -1 lines
Consistently use __inline instead of __inline__ as the former is an empty macro in <sys/cdefs.h> for compilers without support for inline.
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Thu Jul 1 07:46:28 2004 UTC (7 years, 7 months ago) by jhb
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Diff to: previous 1.109: preferred, colored
Changes since revision 1.109: +2 -2 lines
Trim a few things from the dmesg output and stick them under bootverbose to cut down on the clutter including PCI interrupt routing, MTRR, pcibios, etc. Discussed with: USENIX Cabal
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Wed Feb 18 22:41:53 2004 UTC (7 years, 11 months ago) by jhb
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Diff to: previous 1.108: preferred, colored
Changes since revision 1.108: +5 -424 lines
Switch to using the new $PIR interrupt routing code and remove the old code. The pci_cfgreg.c file now just controls reading/writing PCI config registers.
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Wed Dec 31 16:56:32 2003 UTC (8 years, 1 month ago) by jhb
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Diff to: previous 1.107: preferred, colored
Changes since revision 1.107: +1 -1 lines
Replace an outb() during the test for configuration mechanism #1 with a DELAY(1) instead. After wading through old commit logs, I found that the outb() was added not as part of the test but as an intentional delay. In fact, according to Shanley's PCI book, the configuration 1 data and address ports should only be accessed using aligned 32-bit accesses (i.e. inl() and outl()). Thus, using outb() to just the last byte of the port violates the PCI spec it would seem. On at least one box doing so broke the probe for PCI, whereas changing it to a DELAY(1) fixed the probe. Reported by: Sean Welch <welchsm@earthlink.net> MFC after: 1 week
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Mon Nov 3 21:53:38 2003 UTC (8 years, 3 months ago) by jhb
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CVS tags: RELENG_5_2_BP, RELENG_5_2_1_RELEASE, RELENG_5_2_0_RELEASE, RELENG_5_2
Diff to: previous 1.106: preferred, colored
Changes since revision 1.106: +2 -49 lines
New APIC support code: - The apic interrupt entry points have been rewritten so that each entry point can serve 32 different vectors. When the entry is executed, it uses one of the 32-bit ISR registers to determine which vector in its assigned range was triggered. Thus, the apic code can support 159 different interrupt vectors with only 5 entry points. - We now always to disable the local APIC to work around an errata in certain PPros and then re-enable it again if we decide to use the APICs to route interrupts. - We no longer map IO APICs or local APICs using special page table entries. Instead, we just use pmap_mapdev(). We also no longer export the virtual address of the local APIC as a global symbol to the rest of the system, but only in local_apic.c. To aid this, the APIC ID of each CPU is exported as a per-CPU variable. - Interrupt sources are provided for each intpin on each IO APIC. Currently, each source is given a unique interrupt vector meaning that PCI interrupts are not shared on most machines with an I/O APIC. That mapping for interrupt sources to interrupt vectors is up to the APIC enumerator driver however. - We no longer probe to see if we need to use mixed mode to route IRQ 0, instead we always use mixed mode to route IRQ 0 for now. This can be disabled via the 'NO_MIXED_MODE' kernel option. - The npx(4) driver now always probes to see if a built-in FPU is present since this test can now be performed with the new APIC code. However, an SMP kernel will panic if there is more than one CPU and a built-in FPU is not found. - PCI interrupts are now properly routed when using APICs to route interrupts, so remove the hack to psuedo-route interrupts when the intpin register was read. - The apic.h header was moved to apicreg.h and a new apicvar.h header that declares the APIs used by the new APIC code was added.
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Tue Oct 21 18:28:34 2003 UTC (8 years, 3 months ago) by silby
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Diff to: previous 1.105: preferred, colored
Changes since revision 1.105: +1 -1 lines
Change all SYSCTLS which are readonly and have a related TUNABLE from CTLFLAG_RD to CTLFLAG_RDTUN so that sysctl(8) can provide more useful error messages.
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Wed Sep 10 06:00:53 2003 UTC (8 years, 5 months ago) by jhb
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Diff to: previous 1.104: preferred, colored
Changes since revision 1.104: +1 -1 lines
We represent PCI intpin's two different ways. One is the way that the intpin register is expressed in hardware where 0 means none, 1 means INTA, 2 INTB, etc. The other way is commonly used in loops where 0 means INTA, 1 means INTB, etc. The matchpin argument to pci_cfgintr_search() is supposed to be the first form, but we passsed in a loop index of the second. This fix adds one to the loop index to convert to the first form. Reported by: Pavlin Radoslavov <pavlin@icir.org>
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Sat Aug 2 05:14:17 2003 UTC (8 years, 6 months ago) by nyan
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Diff to: previous 1.103: preferred, colored
Changes since revision 1.103: +8 -2 lines
PC98 uses different mask of IRQ.
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Fri Aug 1 21:31:36 2003 UTC (8 years, 6 months ago) by imp
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Diff to: previous 1.102: preferred, colored
Changes since revision 1.102: +14 -0 lines
Add hw.pci.irq_override_mask, which is a mask of interrupts that are considered to be good to try when it otherwise has no clue about which interrupts to try. This is a band-aide and we really should try to balance the IRQs that we arbitrarily pick, but it should help some people that would otherwise get bad IRQs.
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Mon Jun 2 17:01:49 2003 UTC (8 years, 8 months ago) by obrien
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Diff to: previous 1.101: preferred, colored
Changes since revision 1.101: +3 -3 lines
Use __FBSDID().
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Tue Feb 18 03:36:48 2003 UTC (8 years, 11 months ago) by peter
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CVS tags: RELENG_5_1_BP, RELENG_5_1_0_RELEASE, RELENG_5_1
Diff to: previous 1.100: preferred, colored
Changes since revision 1.100: +28 -129 lines
Initiate de-orbit burn for USE_PCI_BIOS_FOR_READ_WRITE. This has been #if'ed out for a while. Complete the deed and tidy up some other bits. We need to be able to call this stuff from outer edges of interrupt handlers for devices that have the ISR bits in pci config space. Making the bios code mpsafe was just too hairy. We had also stubbed it out some time ago due to there simply being too much brokenness in too many systems. This adds a leaf lock so that it is safe to use pci_read_config() and pci_write_config() from interrupt handlers. We still will use pcibios to do interrupt routing if there is no acpi.. [yes, I tested this] Briefly glanced at by: imp
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Thu Nov 14 05:22:37 2002 UTC (9 years, 2 months ago) by imp
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CVS tags: RELENG_5_0_BP, RELENG_5_0_0_RELEASE, RELENG_5_0
Diff to: previous 1.99: preferred, colored
Changes since revision 1.99: +1 -1 lines
MFp4: o Fix small style nit. This was supposed to be part of the last batch of style fixes, but somehow didn't get merged.
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Sat Nov 2 22:35:24 2002 UTC (9 years, 3 months ago) by imp
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Diff to: previous 1.98: preferred, colored
Changes since revision 1.98: +34 -10 lines
MFp4: o It turns out that we always need to try to route the interrupts for the case where the $PIR tells us there can be only one. Some machines require this, while others fail when we try to do this (bogusly, imho). Since we have no apriori way of knowing which is which, we always try to do the routing and hope for the best if things fail. o Add some additional comments that state the obvious, but amplify it in non-obvious ways (judging from the questions I've gotten). This should un-break older laptops that still have to use PCIBIOS to route interrupts. Tested by: sam
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Sat Nov 2 22:32:04 2002 UTC (9 years, 3 months ago) by imp
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Diff to: previous 1.97: preferred, colored
Changes since revision 1.97: +11 -10 lines
Use 0xffffffff instead of -1 for id to compare against. Use exact width types, since this is a MD file and won't be used elsewhere. Fix a couple of resulting printf breakages Bug found by: phk using Flexlint
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Mon Oct 7 05:15:05 2002 UTC (9 years, 4 months ago) by imp
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Diff to: previous 1.96: preferred, colored
Changes since revision 1.96: +12 -7 lines
o go ahead and route the interupt, even if it is supposedly unique. there are some strange machines that seem to need this. o delete bogus comment. o don't use the the bios for read/writing config space. They interact badly with SMP and being called from ISR. This brings -current in line with -stable. # make the latter #ifdef on USE_PCI_BIOS_FOR_READ_WRITE in case we # need to go back in a hurry.
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Sat Sep 28 17:36:29 2002 UTC (9 years, 4 months ago) by phk
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Diff to: previous 1.95: preferred, colored
Changes since revision 1.95: +5 -3 lines
Don't call function in return() for a void function.
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Mon Sep 23 18:13:42 2002 UTC (9 years, 4 months ago) by jhb
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Diff to: previous 1.94: preferred, colored
Changes since revision 1.94: +4 -1 lines
Put verbose printf's in the PCI BIOS interrupt routing code under if (bootverbose).
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Fri Sep 20 19:16:41 2002 UTC (9 years, 4 months ago) by jhb
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Diff to: previous 1.93: preferred, colored
Changes since revision 1.93: +0 -1 lines
Axe unused include.
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Mon Sep 9 18:24:35 2002 UTC (9 years, 5 months ago) by jhb
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Diff to: previous 1.92: preferred, colored
Changes since revision 1.92: +2 -1 lines
Make sure a $PIR table header has a valid length before accepting the table as valid. Submitted by: Michal Mertl <mime@traveller.cz>
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Fri Sep 6 22:15:44 2002 UTC (9 years, 5 months ago) by jhb
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Diff to: previous 1.91: preferred, colored
Changes since revision 1.91: +19 -0 lines
Add a function pci_probe_route_table() that returns true if our PCI BIOS supports interrupt routing and if the specified PCI bus is present in the routing table.
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Fri Sep 6 19:25:25 2002 UTC (9 years, 5 months ago) by jhb
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Diff to: previous 1.90: preferred, colored
Changes since revision 1.90: +3 -0 lines
Dump the $PIR table if booting verbose.
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Fri Sep 6 17:08:07 2002 UTC (9 years, 5 months ago) by jhb
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Diff to: previous 1.89: preferred, colored
Changes since revision 1.89: +33 -1 lines
- Add a pci_cfgintr_valid() function to see if a given IRQ is a valid IRQ for an entry in a PCIBIOS interrupt routing ($PIR) table. - Change pci_cfgintr() to except the current IRQ of a device as a fourth argument and to use that IRQ for the device if it is valid. - If an intpin entry in a $PIR entry has a link of 0, it means that that intpin isn't connected to anything that can trigger an interrupt. Thus, test the link against 0 to find invalid entries in the table instead of implicitly relying on the irqs field to be zero. In the machines I have looked at, intpin entries with a link of 0 often have the bits for all possible interrupts for PCI devices set.
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Fri Sep 6 16:10:12 2002 UTC (9 years, 5 months ago) by jhb
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Diff to: previous 1.88: preferred, colored
Changes since revision 1.88: +54 -2 lines
Add support for printing out the contents of a PCI BIOS $PIR interrupt routing table on the console. Eventually it will be printed during verbose boots.
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Thu Sep 5 17:07:07 2002 UTC (9 years, 5 months ago) by jhb
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Diff to: previous 1.87: preferred, colored
Changes since revision 1.87: +2 -2 lines
Test PCIbios.ventry against 0 to see if we found a PCIbios entry point, not the 'entry' member. The entry point is formed from both a base and a relative entry point. 'entry' is that relative offset. It is perfectly valid to have an entry point with a relative offset of 0. PCIbios.ventry is the virtual address of the entry point that takes both 'base' and 'entry' into account, thus it is the proper variable to test to see if we have an entry point or not.
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Sun Jul 21 05:35:42 2002 UTC (9 years, 6 months ago) by imp
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Diff to: previous 1.86: preferred, colored
Changes since revision 1.86: +486 -468 lines
style(9)ize the whole file Approved in concept a long time ago by: msmith
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Sat Jun 1 05:14:11 2002 UTC (9 years, 8 months ago) by imp
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Diff to: previous 1.85: preferred, colored
Changes since revision 1.85: +17 -11 lines
Use a common function to map the bogus intlines. Don't require pin be non-zero before we map bogus intlines, always do it. This fixes a number of problems on HP Omnibook computers. Tested/Reviewed by: Brooks Davis
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Wed May 29 16:16:16 2002 UTC (9 years, 8 months ago) by brooks
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Diff to: previous 1.84: preferred, colored
Changes since revision 1.84: +8 -0 lines
Restore the irq=0 => irq=255 hack to pci_cfgintr_search(). Just having it in pci_cfgregread() wasn't sufficent on at least the HP Omnibook 500. Reviewed by: imp
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Wed Apr 24 15:30:11 2002 UTC (9 years, 9 months ago) by imp
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Diff to: previous 1.83: preferred, colored
Changes since revision 1.83: +18 -12 lines
o Work around bugs in the powerof2 macro: It thinks that 0 is a power of 2, but that's not the case. This fixes the case where there were slots in the PIR table that had no bits set, but we assumed they did and used strange results as a result. o Map invalid INTLINE registers to 255 in pci_cfgreg.c. This should allow us to remove the bogus checks in MI code for non-255 values. I put these changes out for review a while ago, but no one responded to them, so into current they go. This should help us work better on machines that don't route interrupts in the traditional way. MFC After: 4286 millifortnights
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Sat Mar 16 23:02:41 2002 UTC (9 years, 10 months ago) by imp
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Diff to: previous 1.82: preferred, colored
Changes since revision 1.82: +3 -3 lines
Don't call the bios if the interrupt appaers to be already routed. Some older PCI BIOSes hate this and this leads to panics when it is done. Also, assume that a uniquely routed interrupt is already routed. This also seems to help some older laptops with feable BIOSes cope.
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Sun Jan 20 03:28:29 2002 UTC (10 years ago) by imp
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Diff to: previous 1.81: preferred, colored
Changes since revision 1.81: +22 -13 lines
The Libretto L series has no $PIR table, but does have a _PIR table. This typo keeps us from properly routing an interrupt for CardBus bridges on this machine. So, now we look for $PIR and then _PIR to cope. With these changes, the Libretto L1 now works properly. Evidentally, the idea comes from patch that the Japanese version of RedHat (or against a Japanese version of Red Hat), but my Japanese isn't good enough to to know for sure. Reported by: Hiroyuki Aizu-san <eyes@navi.org> # This may be an MFC candidate, but I'm not yet sure.
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Mon Nov 26 21:25:03 2001 UTC (10 years, 2 months ago) by imp
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Diff to: previous 1.80: preferred, colored
Changes since revision 1.80: +15 -6 lines
MFS: I was confused. This code wasn't in -current after all. Merge in the irq 0 detection. Add comment about why. If we have irq 0, ignore it like we do irq 255. Some BIOS writers aren't careful like they should be.
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Tue Aug 28 16:35:01 2001 UTC (10 years, 5 months ago) by imp
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CVS tags: KSE_PRE_MILESTONE_2, KSE_MILESTONE_2
Diff to: previous 1.79: preferred, colored
Changes since revision 1.79: +11 -18 lines
It turns out that while Toshiba laptops don't want to route interrupts multiple times, others do. The last strategy, which was to assume that already routed interrupts were good and just return them doesn't work for some laptops. So, instead, we have a new strategy: we notice that we have an interrupt that's already routed. We go ahead and try to route it, none the less. We will assume that it is correctly routed, even if the route fails. We still assume that other failures in the bios32 call are because the interrupt is NOT routed. Note: some laptops do not support the bios32 interface to PCI BIOS and we need to call it via the INT 2A interface. That is another windmill to till at later. Also correct a minor typo and minor whitespace nits. Strong MFC candidate.
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Mon Aug 27 20:44:38 2001 UTC (10 years, 5 months ago) by imp
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Diff to: previous 1.78: preferred, colored
Changes since revision 1.78: +61 -31 lines
MFS: IRQ ordering, PRVERB and more whining in pcibios_get_version on failure. Check return value from bios32. [[ Yes, I was bad and committed this to stable first. I should have done the commit in the other order. ]]
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Tue Aug 21 07:53:37 2001 UTC (10 years, 5 months ago) by imp
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Diff to: previous 1.77: preferred, colored
Changes since revision 1.77: +26 -3 lines
The general conesnsus on irc was that pci bios for config registers and such was just a bad idea and one that users should be forced to enable if they want it. This patch introduces a hw.pci.enable_pcibios tunable for those people. This does not impact the pcibios interrupt routing at all. Approved by: peter, msmith
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Tue Aug 21 03:10:55 2001 UTC (10 years, 5 months ago) by peter
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Diff to: previous 1.76: preferred, colored
Changes since revision 1.76: +14 -1 lines
Detect a certain type of PCIBIOS brain damage. For some reason, some bios vendors took it apon themselves to "censor" the host->pci bridges from PCIBIOS callers, even when the caller explicitly asks for them. This includes certain Compaq machines (eg: DL360) and some laptops. If we detect this, shut down pcibios and revert to using IO port bashing. Under -current, apcica does a better job anyway.
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Fri May 11 04:52:29 2001 UTC (10 years, 9 months ago) by msmith
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Diff to: previous 1.75: preferred, colored
Changes since revision 1.75: +2 -2 lines
Un-swap irq/link byte values so that printf works.
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Thu Feb 8 20:44:49 2001 UTC (11 years ago) by msmith
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Diff to: previous 1.74: preferred, colored
Changes since revision 1.74: +9 -4 lines
Free the memory we get from devclass_get_devices and device_get_children. Submitted by: wpaul
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Fri Jan 19 09:10:14 2001 UTC (11 years ago) by peter
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Diff to: previous 1.73: preferred, colored
Changes since revision 1.73: +2 -2 lines
Fix a warning due to missing prototype.
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Fri Jan 12 07:49:29 2001 UTC (11 years, 1 month ago) by bmilekic
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Diff to: previous 1.72: preferred, colored
Changes since revision 1.72: +2 -2 lines
Remove declaration of airq variable from outer block. There were two declarations of a variable of the same name. The one in the outer block was unused and probably just slipped in at one point or another. This silences a compiler warning.
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Fri Dec 8 22:11:06 2000 UTC (11 years, 2 months ago) by msmith
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Diff to: previous 1.71: preferred, colored
Changes since revision 1.71: +53 -3 lines
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
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Thu Nov 2 00:37:45 2000 UTC (11 years, 3 months ago) by msmith
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Diff to: previous 1.70: preferred, colored
Changes since revision 1.70: +163 -17 lines
Improve the PCI interrupt routing code. Now the process is as follows: - Look for a hardwired interrupt in the routing table for this bus/device/pin (we already did this). - Look for another device with the same link byte which has a hardwired interrupt. - Look for a PCI device matching an entry with the same link byte which has already been assigned an interrupt, and use that. - Look for a routable interrupt listed in the "PCI only" interrupts field and use that. - Pick the first interrupt that's marked as routable and use that.
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Thu Oct 19 08:06:50 2000 UTC (11 years, 3 months ago) by msmith
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Diff to: previous 1.69: preferred, colored
Changes since revision 1.69: +23 -5 lines
Call the BIOS to route the selected interrupt. Correctly calculate the interrupt from the PCI routing table (ffs returns 1 for the rightmost bit, not 0).
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Mon Oct 16 07:31:13 2000 UTC (11 years, 3 months ago) by imp
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Diff to: previous 1.68: preferred, colored
Changes since revision 1.68: +3 -6 lines
Remove debug writes introduced in prior commit
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Mon Oct 16 07:25:08 2000 UTC (11 years, 3 months ago) by imp
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Diff to: previous 1.67: preferred, colored
Changes since revision 1.67: +66 -4 lines
Add the ability to use the $PIR table in the BIOS to route interrupts on demand. Submitted by: msmith
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Mon Oct 2 07:11:13 2000 UTC (11 years, 4 months ago) by msmith
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Diff to: previous 1.66: preferred, colored
Changes since revision 1.66: +242 -697 lines
Move the i386 PCI attachment code out of i386/isa back into i386/pci. Split out the configuration space access primitives, as these are needed elsewhere as well.
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Thu Sep 28 00:37:32 2000 UTC (11 years, 4 months ago) by peter
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Diff to: previous 1.65: preferred, colored
Changes since revision 1.65: +7 -20 lines
Get out the roto-rooter and clean up the abuse of nexus ivars by the i386/isa/pcibus.c. This gets -current running again on multiple host->pci machines after the most recent nexus commits. I had discussed this with Mike Smith, but ended up doing it slightly differently to what we discussed as it turned out cleaner this way. Mike was suggesting creating a new resource (SYS_RES_PCIBUS) or something and using *_[gs]et_resource(), but IMHO that wasn't ideal as SYS_RES_* is meant to be a global platform property, not a quirk of a given implementation. This does use the ivar methods but does so properly. It also now prints the physical pci bus that a host->pci bridge (pcib) corresponds to.
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Tue Sep 5 00:53:34 2000 UTC (11 years, 5 months ago) by peter
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CVS tags: old_PRE_SMPNG
Diff to: previous 1.64: preferred, colored
Changes since revision 1.64: +90 -20 lines
Catch a few more bogosities in certain chipsets before they mess us up. Some have dual host->PCI bridges for the same logical pci bus (!), eg: some of the RCC chipsets. This is a 32/64 bit 33/66MHz and dual pci voltage motherboard so persumably there are electical or signalling differences but they are otherwise the same logical bus. The new PCI probe code however was getting somewhat upset about it and ended up creating two pci bridges to the same logical bus, which caused devices on that logical bus to appear and be probed twice. The ACPI data on this box correctly identifies this stuff, so bring on ACPI! :-)
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Thu Aug 31 23:11:34 2000 UTC (11 years, 5 months ago) by peter
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Diff to: previous 1.63: preferred, colored
Changes since revision 1.63: +51 -11 lines
Take a shot at fixing multiple pci busses on i386. pcib_set_bus() cannot be used on the new child because it is meant to be used on the *pci* device (it looks at the parent internally) not the pcib being added. Bite the bullet and use ivars for the bus number to avoid any doubts about whether the softc is consistant between probe and attach. This should not break the Alpha code.
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Mon Aug 28 21:48:12 2000 UTC (11 years, 5 months ago) by dfr
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Diff to: previous 1.62: preferred, colored
Changes since revision 1.62: +85 -49 lines
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
Revision 1.62: download - view: text, markup, annotated - select for diffs
Fri Jun 23 07:44:33 2000 UTC (11 years, 7 months ago) by msmith
Branches: MAIN
Diff to: previous 1.61: preferred, colored
Changes since revision 1.61: +55 -1 lines
Add PnP probe methods to some common AT hardware drivers. In each case, the PnP probe is merely a stub as we make assumptions about some of this hardware before we have probed it. Since these devices (with the exception of the speaker) are 'standard', suppress output in the !bootverbose case to clean up the probe messages somewhat.
Revision 1.61: download - view: text, markup, annotated - select for diffs
Wed May 24 09:03:30 2000 UTC (11 years, 8 months ago) by kuriyama
Branches: MAIN
Diff to: previous 1.60: preferred, colored
Changes since revision 1.60: +4 -1 lines
Add OPTi 82C700 chipset. Submitted by: sanpei@sanpei.org PR: kern/18155 (part of)
Revision 1.60: download - view: text, markup, annotated - select for diffs
Wed May 24 02:24:38 2000 UTC (11 years, 8 months ago) by kuriyama
Branches: MAIN
Diff to: previous 1.59: preferred, colored
Changes since revision 1.59: +4 -1 lines
Add 440MX chipset. Submitted by: YOSHIMURA Hideaki <hideakiy@cs-tokyo01.chuosystem.co.jp> References: [bsd-nomads:13764]
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Thu May 4 17:44:55 2000 UTC (11 years, 9 months ago) by msmith
Branches: MAIN
Diff to: previous 1.58: preferred, colored
Changes since revision 1.58: +6 -2 lines
Don't assume that the PCI BIOS is going to clear the unused bits in %ecx when it returns.
Revision 1.58: download - view: text, markup, annotated - select for diffs
Sun Apr 16 20:48:33 2000 UTC (11 years, 9 months ago) by msmith
Branches: MAIN
Diff to: previous 1.57: preferred, colored
Changes since revision 1.57: +113 -10 lines
Some more i386-only BIOS-friendliness: - Add support for using the PCI BIOS functions for configuration space accesses, and make this the default. - Make PNPBIOS the default (obsoletes the PNPBIOS config option). - Add two new boot-time tunables to disable each of the above.
Revision 1.57: download - view: text, markup, annotated - select for diffs
Wed Feb 23 20:25:06 2000 UTC (11 years, 11 months ago) by dfr
Branches: MAIN
CVS tags: old_RELENG_4_BP, old_RELENG_4_1_1_RELEASE, old_RELENG_4_1_0_RELEASE, old_RELENG_4_0_0_RELEASE, old_RELENG_4
Diff to: previous 1.56: preferred, colored
Changes since revision 1.56: +11 -2 lines
Add a workaround to allow us to detect the second pci bus on an HP Netserver LS/2. Approved by: jkh
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Sun Feb 13 09:49:05 2000 UTC (12 years ago) by dfr
Branches: MAIN
Diff to: previous 1.55: preferred, colored
Changes since revision 1.55: +2 -1 lines
Fix an uninitialised variable which affected probing on some machines. Approved by: jkh Reviewed by: gallatin
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Wed Feb 9 20:05:30 2000 UTC (12 years ago) by gallatin
Branches: MAIN
Diff to: previous 1.54: preferred, colored
Changes since revision 1.54: +23 -8 lines
Allow allows peer pci buses which are directly connected to the RCC host pci chipset to be probed & attached on newer Dell PowerEdge servers, such as the 2400 and 4400. Reviewed by: dfr, msmith, jlemon Tested by: hnokubi@yyy.or.jp (in a previous incantation) Approved by: jkh
Revision 1.54: download - view: text, markup, annotated - select for diffs
Mon Feb 7 12:50:32 2000 UTC (12 years ago) by n_hibma
Branches: MAIN
Diff to: previous 1.53: preferred, colored
Changes since revision 1.53: +10 -1 lines
Add PCI Id's for i810 chipsets. PR: 16517 Submitted by: SAKIYAMA Nobuo <sakichan@lares.dti.ne.jp> Approved by: jhk
Revision 1.53: download - view: text, markup, annotated - select for diffs
Sat Jan 8 08:31:24 2000 UTC (12 years, 1 month ago) by peter
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Diff to: previous 1.52: preferred, colored
Changes since revision 1.52: +1 -7 lines
Clean up the cfgmech/pci_mechanism debris. The reason for the existance of this is no longer an issue as we have a replacement driver for the one that needed it. Reviewed by: dfr
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Sun Dec 5 18:41:34 1999 UTC (12 years, 2 months ago) by dfr
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Diff to: previous 1.51: preferred, colored
Changes since revision 1.51: +3 -1 lines
Don't use a bogus bus number for Ross host-pci bridges. PR: kern/15278 Submitted by: Ahmed Benani <ahmed_benani@urbanet.ch>
Revision 1.51: download - view: text, markup, annotated - select for diffs
Fri Dec 3 08:41:14 1999 UTC (12 years, 2 months ago) by mdodd
Branches: MAIN
Diff to: previous 1.50: preferred, colored
Changes since revision 1.50: +2 -2 lines
Remove the 'ivars' arguement to device_add_child() and device_add_child_ordered(). 'ivars' may now be set using the device_set_ivars() function. This makes it easier for us to change how arbitrary data structures are associated with a device_t. Eventually we won't be modifying device_t to add additional pointers for ivars, softc data etc. Despite my best efforts I've probably forgotten something so let me know if this breaks anything. I've been running with this change for months and its been quite involved actually isolating all the changes from the rest of the local changes in my tree. Reviewed by: peter, dfr
Revision 1.50: download - view: text, markup, annotated - select for diffs
Thu Nov 18 08:58:37 1999 UTC (12 years, 2 months ago) by peter
Branches: MAIN
Diff to: previous 1.49: preferred, colored
Changes since revision 1.49: +15 -1 lines
If we have found pci devices via pci_cfgopen(), but don't find a host->pci bridge specifically, then add a pcib0 device on the motherboard for the pci bus to hang off. Requested by: Anders Andersson <anders@sanyusan.se> Obtained from: dfr
Revision 1.49: download - view: text, markup, annotated - select for diffs
Mon Oct 25 06:27:44 1999 UTC (12 years, 3 months ago) by alc
Branches: MAIN
Diff to: previous 1.48: preferred, colored
Changes since revision 1.48: +6 -1 lines
Add text for the AMD-751 host-to-PCI and PCI-to-PCI (AGP) bridges.
Revision 1.8.4.8: download - view: text, markup, annotated - select for diffs
Sun Sep 5 08:31:02 1999 UTC (12 years, 5 months ago) by peter
Branches: old_RELENG_2_1_0
Diff to: previous 1.8.4.7: preferred, colored; branchpoint 1.8: preferred, colored; next MAIN 1.9: preferred, colored
Changes since revision 1.8.4.7: +1 -1 lines
$Id$ -> $FreeBSD$
Revision 1.27.2.3: download - view: text, markup, annotated - select for diffs
Sun Sep 5 08:13:17 1999 UTC (12 years, 5 months ago) by peter
Branches: old_RELENG_2_2
Diff to: previous 1.27.2.2: preferred, colored; branchpoint 1.27: preferred, colored; next MAIN 1.28: preferred, colored
Changes since revision 1.27.2.2: +1 -1 lines
$Id$ -> $FreeBSD$
Revision 1.41.2.1: download - view: text, markup, annotated - select for diffs
Sun Aug 29 16:07:29 1999 UTC (12 years, 5 months ago) by peter
Branches: old_RELENG_3
CVS tags: old_RELENG_3_5_0_RELEASE, old_RELENG_3_4_0_RELEASE, old_RELENG_3_3_0_RELEASE
Diff to: previous 1.41: preferred, colored; next MAIN 1.42: preferred, colored
Changes since revision 1.41: +1 -1 lines
$Id$ -> $FreeBSD$
Revision 1.48: download - view: text, markup, annotated - select for diffs
Sat Aug 28 00:44:59 1999 UTC (12 years, 5 months ago) by peter
Branches: MAIN
Diff to: previous 1.47: preferred, colored
Changes since revision 1.47: +1 -1 lines
$Id$ -> $FreeBSD$
Revision 1.47: download - view: text, markup, annotated - select for diffs
Sun Aug 22 19:54:11 1999 UTC (12 years, 5 months ago) by peter
Branches: MAIN
Diff to: previous 1.46: preferred, colored
Changes since revision 1.46: +6 -2 lines
Make the identify routine add itself with priority 100 to make sure it goes after the npx/apm devices and any other motherboard devices that may get added down the track.
Revision 1.46: download - view: text, markup, annotated - select for diffs
Tue Aug 10 09:22:21 1999 UTC (12 years, 6 months ago) by peter
Branches: MAIN
Diff to: previous 1.45: preferred, colored
Changes since revision 1.45: +7 -6 lines
Hopefully fix the previous commit, it caused *all* bridges to be detected as PCI->HOST bridges on my (440BX) box. My change is to remove the test at the beginning entirely, letting the switch on the device ID happen first. If the device ID is unknown, then (in the default case) check for the generic PCIS_BRIDGE_HOST tag. This should allow wierd cases (eg: wpaul's IMS VL bridge) to work by using the id override. This strategy is more in line with the other PCI match methods we use elsewhere, I only have a limited testbed, but having my USB etc devices detected as PCI->HOST bridges doesn't look good.
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Mon Aug 9 21:12:18 1999 UTC (12 years, 6 months ago) by wpaul
Branches: MAIN
Diff to: previous 1.44: preferred, colored
Changes since revision 1.44: +9 -3 lines
Fix nexus_pcib_is_host_bridge() so that it detects my 486's PCI bus
correctly. It has the following code:
if (class != PCIC_BRIDGE || subclass != PCIS_BRIDGE_HOST)
return NULL;
My 486 has an Integrated Micro Solutions PCI bridge which identifies
itself as subclass PCIS_BRIDGE_OTHER, not PCIS_BRIDGE_HOST. Consequently,
it gets ignored. In my opinion, the correct test should be:
if ((class != PCIC_BRIDGE) && (subclass != PCIS_BRIDGE_HOST))
return NULL;
That way the test still succeeds because the chip's class is PCIC_BRIDGE.
Clearly it's not reasonable to expect all host to PCI bridges to always
have a subclass of PCIS_BRIDGE_HOST since I've got one that doesn't.
This way the sanity test should remain relatively sane while still allowing
some oddball yet correct hardware to work. If somebody has a better way
to do it, go ahead and tweak the test, but be aware that
class == PCIC_BRIDGE and subclass == PCIS_BRIDGE_OTHER is a valid case.
While I was here, I also added an explicit ID string for the IMS chipset.
I also dealt with a minor style nit: it's bad karma not to have a default
case for your switch statements, but the one in this routine doesn't have
one. The default string of "Host to PCI bridge" is now assigned in a
default case of the switch statement instead of initializing "s" with the
string before the switch and then not having any default case.
Revision 1.44: download - view: text, markup, annotated - select for diffs
Wed Aug 4 13:38:24 1999 UTC (12 years, 6 months ago) by peter
Branches: MAIN
Diff to: previous 1.43: preferred, colored
Changes since revision 1.43: +4 -5 lines
Don't probe if pci_cfgopen() fails to find pci hardware, like we used to to. This might have caused interesting things on non-PCI hardware if PCI was compiled in.
Revision 1.43: download - view: text, markup, annotated - select for diffs
Fri Jul 16 01:00:29 1999 UTC (12 years, 7 months ago) by msmith
Branches: MAIN
Diff to: previous 1.42: preferred, colored
Changes since revision 1.42: +180 -4 lines
Add support for multiple PCI busses directly connected to the nexus. This is only partially complete, but allows 450NX-based systems with more than one PCI bus to be used again. Submitted by: dfr
Revision 1.42: download - view: text, markup, annotated - select for diffs
Tue May 18 20:48:43 1999 UTC (12 years, 8 months ago) by peter
Branches: MAIN
Diff to: previous 1.41: preferred, colored
Changes since revision 1.41: +47 -3 lines
Move pcibus (host -> pci bus) probe/attach routines from nexus to pcibus.c. pci_cfgopen() becomes static and there are no more bus #ifdef's in nexus.c.
Revision 1.27.2.2: download - view: text, markup, annotated - select for diffs
Wed May 6 19:09:10 1998 UTC (13 years, 9 months ago) by gibbs
Branches: old_RELENG_2_2
CVS tags: old_RELENG_2_2_8_RELEASE, old_RELENG_2_2_7_RELEASE
Diff to: previous 1.27.2.1: preferred, colored; branchpoint 1.27: preferred, colored
Changes since revision 1.27.2.1: +65 -1 lines
MFC fd.c: mcd.c: scd.c: wcd.c: wd.c: wfd.c: Convert to using new buf queue fucntions. icu.s: isa.c: isa_device.h: vector.s: Remove DPT SWI code. Add CAM SWI code. sio.c: Remove bogus DPTOPT code. pcibus.c: Add functions for extracting the bus, device, and function from old style pcici_ts.
Revision 1.27.2.1: download - view: text, markup, annotated - select for diffs
Sat Mar 7 11:33:25 1998 UTC (13 years, 11 months ago) by se
Branches: old_RELENG_2_2
CVS tags: old_RELENG_2_2_6_RELEASE
Diff to: previous 1.27: preferred, colored
Changes since revision 1.27: +1 -2 lines
Add PCI LKM support. Drivers that want to be loadable need to call the new function "pci_register_lkm(&pci_device, 0)" from their "load" entry point. The new PCIOCATTACHED ioctl on /dev/pci allows user-land programs to find out, whether a PCI device got a driver attached. The "pciconf" function has been extended to return that information for automatic PCI driver loading from /etc/rc.
Revision 1.41: download - view: text, markup, annotated - select for diffs
Sat Dec 20 09:04:25 1997 UTC (14 years, 1 month ago) by se
Branches: MAIN
CVS tags: old_RELENG_3_BP, old_RELENG_3_2_PAO_BP, old_RELENG_3_2_PAO, old_RELENG_3_2_0_RELEASE, old_RELENG_3_1_0_RELEASE, old_RELENG_3_0_0_RELEASE, old_PRE_VFS_BIO_NFS_PATCH, old_PRE_SOFTUPDATE, old_PRE_SMP_VMSHARE, old_PRE_NOBDEV, old_PRE_NEWBUS, old_PRE_DEVFS_SLICE, old_POST_VFS_BIO_NFS_PATCH, old_POST_SOFTUPDATE, old_POST_SMP_VMSHARE, old_POST_NEWBUS, old_POST_DEVFS_SLICE
Branch point for: old_RELENG_3
Diff to: previous 1.40: preferred, colored
Changes since revision 1.40: +2 -2 lines
Make the class code checks in function pci_cfgcheck less strict. It failed to recognize the PCI bus in a system that had only an old chip-set (class code 000000) and a Cyclom multiport serial card on PCI bus 0, but no VGA card or disk or network controller. PR: i386/5300 Submitted by: Nickolay N. Dudorov <nnd@itfs.nsk.su>
Revision 1.40: download - view: text, markup, annotated - select for diffs
Sun Jul 20 14:10:08 1997 UTC (14 years, 6 months ago) by bde
Branches: MAIN
Diff to: previous 1.39: preferred, colored
Changes since revision 1.39: +1 -2 lines
Removed unused #includes.
Revision 1.39: download - view: text, markup, annotated - select for diffs
Mon May 26 21:52:41 1997 UTC (14 years, 8 months ago) by se
Branches: MAIN
CVS tags: old_WOLLMAN_MBUF, old_BP_WOLLMAN_MBUF
Diff to: previous 1.38: preferred, colored
Changes since revision 1.38: +5 -4 lines
Yet another fix for configuration mechanism 1 register accesses: Adjust the data port address by adding the two low order bits of the register number. The address port takes only a word address (i.e. ignores the two low order bits written to it).
Revision 1.38: download - view: text, markup, annotated - select for diffs
Mon May 26 21:25:24 1997 UTC (14 years, 8 months ago) by se
Branches: MAIN
Diff to: previous 1.37: preferred, colored
Changes since revision 1.37: +2 -2 lines
Fix previous fix: The enable bit is bit 31 (0x8000000) and not bit 15.
Revision 1.37: download - view: text, markup, annotated - select for diffs
Mon May 26 21:11:05 1997 UTC (14 years, 8 months ago) by se
Branches: MAIN
Diff to: previous 1.36: preferred, colored
Changes since revision 1.36: +2 -2 lines
Set enable bit when writing the configuration address in configuration mode 1. Omission of this bit makes all config register accesses fail in on recent chip sets ... (The problem was reported and debug output provided by: Steve Passe)
Revision 1.36: download - view: text, markup, annotated - select for diffs
Mon May 26 15:08:42 1997 UTC (14 years, 8 months ago) by se
Branches: MAIN
Diff to: previous 1.35: preferred, colored
Changes since revision 1.35: +188 -461 lines
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
Revision 1.35: download - view: text, markup, annotated - select for diffs
Wed Apr 9 11:34:50 1997 UTC (14 years, 10 months ago) by se
Branches: MAIN
CVS tags: old_pre_smp_merge, old_post_smp_merge
Diff to: previous 1.34: preferred, colored
Changes since revision 1.34: +2 -2 lines
Mask out revision register in consistency test of class register.
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Wed Apr 9 09:16:27 1997 UTC (14 years, 10 months ago) by se
Branches: MAIN
Diff to: previous 1.33: preferred, colored
Changes since revision 1.33: +6 -6 lines
Fix spelling of align and interrupt in comments.
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Wed Apr 9 09:15:03 1997 UTC (14 years, 10 months ago) by se
Branches: MAIN
Diff to: previous 1.32: preferred, colored
Changes since revision 1.32: +2 -2 lines
Fix consistency test to not fail on pre PCI 2.0 motherboards
Revision 1.32: download - view: text, markup, annotated - select for diffs
Wed Mar 5 20:52:00 1997 UTC (14 years, 11 months ago) by se
Branches: MAIN
Diff to: previous 1.31: preferred, colored
Changes since revision 1.31: +19 -6 lines
improve pcibus_check: Only assume PCI if at least one PCI to anything bridge on bus 0. This fixes problems with EISA-only systems mistakenly being assumed to support PCI.
Revision 1.31: download - view: text, markup, annotated - select for diffs
Sat Feb 22 09:36:58 1997 UTC (14 years, 11 months ago) by peter
Branches: MAIN
Diff to: previous 1.30: preferred, colored
Changes since revision 1.30: +1 -1 lines
Back out part 1 of the MCFH that changed $Id$ to $FreeBSD$. We are not ready for it yet.
Revision 1.30: download - view: text, markup, annotated - select for diffs
Sat Jan 25 18:51:01 1997 UTC (15 years ago) by bde
Branches: MAIN
Diff to: previous 1.29: preferred, colored
Changes since revision 1.29: +0 -1 lines
Sync with <pci/pcibus.h>. pcibus.c unfortunately still compiled (with only 3 or 4 warnings) when pb_maxirq went away.
Revision 1.29: download - view: text, markup, annotated - select for diffs
Tue Jan 14 06:41:21 1997 UTC (15 years, 1 month ago) by jkh
Branches: MAIN
Diff to: previous 1.28: preferred, colored
Changes since revision 1.28: +1 -1 lines
Make the long-awaited change from $Id$ to $FreeBSD$ This will make a number of things easier in the future, as well as (finally!) avoiding the Id-smashing problem which has plagued developers for so long. Boy, I'm glad we're not using sup anymore. This update would have been insane otherwise.
Revision 1.28: download - view: text, markup, annotated - select for diffs
Wed Jan 8 16:12:56 1997 UTC (15 years, 1 month ago) by nate
Branches: MAIN
Diff to: previous 1.27: preferred, colored
Changes since revision 1.27: +2 -2 lines
Make the code more consistant by using the INTR*MASK macros througout the code. Reviewed by: bde [ Bruce suggest removing the macros completely, but I'm not up to that task quite yet. ]
Revision 1.27: download - view: text, markup, annotated - select for diffs
Wed Oct 30 22:38:55 1996 UTC (15 years, 3 months ago) by asami
Branches: MAIN
CVS tags: old_RELENG_2_2_BP, old_RELENG_2_2_5_RELEASE, old_RELENG_2_2_2_RELEASE, old_RELENG_2_2_1_RELEASE, old_RELENG_2_2_0_RELEASE
Branch point for: old_RELENG_2_2
Diff to: previous 1.26: preferred, colored
Changes since revision 1.26: +5 -1 lines
More merge and update.
(1) deleted #if 0
pc98/pc98/mse.c
(2) hold per-unit I/O ports in ed_softc
pc98/pc98/if_ed.c
pc98/pc98/if_ed98.h
(3) merge more files by segregating changes into headers.
new file (moved from pc98/pc98):
i386/isa/aic_98.h
deleted:
well, it's already in the commit message so I won't repeat the
long list here ;)
Submitted by: The FreeBSD(98) Development Team
Revision 1.8.4.7: download - view: text, markup, annotated - select for diffs
Mon Aug 5 19:25:41 1996 UTC (15 years, 6 months ago) by se
Branches: old_RELENG_2_1_0
CVS tags: old_RELENG_2_1_7_RELEASE, old_RELENG_2_1_6_RELEASE, old_RELENG_2_1_6_1_RELEASE
Diff to: previous 1.8.4.6: preferred, colored; branchpoint 1.8: preferred, colored
Changes since revision 1.8.4.6: +3 -3 lines
Small modification to the configuration mechanism 1 detection algorithm. This ought to make it more tolerant against another chip set that does not conform to the PCI spec with regard to the configuration address register ...
Revision 1.8.4.6: download - view: text, markup, annotated - select for diffs
Wed Jun 26 04:36:43 1996 UTC (15 years, 7 months ago) by davidg
Branches: old_RELENG_2_1_0
CVS tags: old_RELENG_2_1_5_RELEASE
Diff to: previous 1.8.4.5: preferred, colored; branchpoint 1.8: preferred, colored
Changes since revision 1.8.4.5: +2 -2 lines
Brought in most of the improvements/bugfixes from the main branch. Thanks to Stefan Esser for taking the time to sort all of this out.
Revision 1.26: download - view: text, markup, annotated - select for diffs
Tue Jun 18 01:22:28 1996 UTC (15 years, 7 months ago) by bde
Branches: MAIN
Diff to: previous 1.25: preferred, colored
Changes since revision 1.25: +1 -2 lines
Removed unused #includes of <i386/isa/icu.h> and <i386/isa/icu.h>. icu.h is only used by the icu support modules and by a few drivers that know too much about the icu (most only use it to convert `n' to `IRQn'). isa.h is only used by ioconf.c and by a few drivers that know too much about isa addresses (a few have to, because config is deficient).
Revision 1.25: download - view: text, markup, annotated - select for diffs
Thu Jun 13 21:50:41 1996 UTC (15 years, 8 months ago) by se
Branches: MAIN
Diff to: previous 1.24: preferred, colored
Changes since revision 1.24: +2 -2 lines
Change CONF1_ENABLE_MSK to 0x7ff00000 in another attempt to decide whether a system could possibly support PCI configuration mechanism 1 (or whether it rather is an EISA only system ...).
Revision 1.24: download - view: text, markup, annotated - select for diffs
Tue Apr 30 21:37:21 1996 UTC (15 years, 9 months ago) by se
Branches: MAIN
Diff to: previous 1.23: preferred, colored
Changes since revision 1.23: +2 -2 lines
Make pcibus_check() ignore Device/Vendor IDs of all 0.
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Sun Apr 7 17:32:15 1996 UTC (15 years, 10 months ago) by bde
Branches: MAIN
Diff to: previous 1.22: preferred, colored
Changes since revision 1.22: +1 -3 lines
Removed now-unused #includes of <machine/cpu.h>. They were for bootverbose being declared in the wrong place.
Revision 1.22: download - view: text, markup, annotated - select for diffs
Fri Mar 29 15:01:51 1996 UTC (15 years, 10 months ago) by bde
Branches: MAIN
CVS tags: old_wollman_polling
Diff to: previous 1.21: preferred, colored
Changes since revision 1.21: +30 -3 lines
Count PCI irqs in up to 4 ISAish counters named `pci irqnn' instead of in the clk0 counter. Reviewed by: s
Revision 1.21: download - view: text, markup, annotated - select for diffs
Sat Dec 16 00:27:59 1995 UTC (16 years, 2 months ago) by bde
Branches: MAIN
Diff to: previous 1.20: preferred, colored
Changes since revision 1.20: +7 -7 lines
Completed function declarations and/or added prototypes and/or added #includes to get prototypes. pci now uses a different interrupt handler type for interrupts that it dispatches and the isa interrupt handler type for the interrupts that it handles.
Revision 1.20: download - view: text, markup, annotated - select for diffs
Sun Dec 10 13:39:04 1995 UTC (16 years, 2 months ago) by phk
Branches: MAIN
Diff to: previous 1.19: preferred, colored
Changes since revision 1.19: +2 -2 lines
Staticize and cleanup.
Revision 1.8.4.5: download - view: text, markup, annotated - select for diffs
Fri Nov 3 08:07:20 1995 UTC (16 years, 3 months ago) by davidg
Branches: old_RELENG_2_1_0
CVS tags: old_RELENG_2_1_0_RELEASE
Diff to: previous 1.8.4.4: preferred, colored; branchpoint 1.8: preferred, colored
Changes since revision 1.8.4.4: +4 -2 lines
Add a special case check to allow Acer PCI chipsets to work with FreeBSD. Submitted by: se
Revision 1.8.4.4: download - view: text, markup, annotated - select for diffs
Fri Oct 20 22:12:53 1995 UTC (16 years, 3 months ago) by davidg
Branches: old_RELENG_2_1_0
Diff to: previous 1.8.4.3: preferred, colored; branchpoint 1.8: preferred, colored
Changes since revision 1.8.4.3: +1 -2 lines
Kill unnecessary outl (CONF1_DATA_PORT, 0) that was killing some non-PCI machines. Submitted by: Stefan Esser <se@zpr.uni-koeln.de>
Revision 1.19: download - view: text, markup, annotated - select for diffs
Tue Oct 17 23:30:11 1995 UTC (16 years, 3 months ago) by se
Branches: MAIN
Diff to: previous 1.18: preferred, colored
Changes since revision 1.18: +2 -2 lines
Make CONF1_ENABLE_MSK1 even less restriktive: Ignore slot ID ...
Revision 1.18: download - view: text, markup, annotated - select for diffs
Tue Oct 17 15:23:14 1995 UTC (16 years, 3 months ago) by se
Branches: MAIN
Diff to: previous 1.17: preferred, colored
Changes since revision 1.17: +5 -4 lines
At least the ASUS Triton motherboards don't disable the PCI bus configuration accesses after the BIOS bus scan. The previous revision made the assumption, that every PCI motherboard did ... Change the test on the initial value of the CONF1_ADDR_PORT register in a way that makes the probe succeed on triton based motherboards, without breaking the EISA motherboard that has some non-PCI register at the same address.
Revision 1.17: download - view: text, markup, annotated - select for diffs
Sun Oct 15 23:43:08 1995 UTC (16 years, 4 months ago) by se
Branches: MAIN
Diff to: previous 1.16: preferred, colored
Changes since revision 1.16: +62 -59 lines
Go back to separate tests for configuration mechanism 1 and mechanism 2. Require the state of the configuration enable bits to be OFF assuming that the BIOS left them that way, as it should anyway to avoid bad things to happen. The tests themselves are copied from the previous release, with the exception of CONF1_ENABLE_MSK1 having the LSB set. This bit should be read back as '0', since only DWORD addresses are legal.
Revision 1.8.4.3: download - view: text, markup, annotated - select for diffs
Tue Oct 10 01:00:58 1995 UTC (16 years, 4 months ago) by davidg
Branches: old_RELENG_2_1_0
Diff to: previous 1.8.4.2: preferred, colored; branchpoint 1.8: preferred, colored
Changes since revision 1.8.4.2: +14 -6 lines
Brought in changes from rev 1.16: fix typo that broke PCI probing on some machines.
Revision 1.16: download - view: text, markup, annotated - select for diffs
Mon Oct 9 21:56:24 1995 UTC (16 years, 4 months ago) by se
Branches: MAIN
Diff to: previous 1.15: preferred, colored
Changes since revision 1.15: +14 -6 lines
Fix bad typo: CONF1_ENABLE_RES1 was written CONF1_ENABLE_CHK1 ...
Revision 1.8.4.2: download - view: text, markup, annotated - select for diffs
Sat Oct 7 12:16:05 1995 UTC (16 years, 4 months ago) by davidg
Branches: old_RELENG_2_1_0
Diff to: previous 1.8.4.1: preferred, colored; branchpoint 1.8: preferred, colored
Changes since revision 1.8.4.1: +104 -32 lines
Sync with main branch: Properly find PCI on Compaq and other machines.
Revision 1.15: download - view: text, markup, annotated - select for diffs
Fri Sep 22 19:10:54 1995 UTC (16 years, 4 months ago) by se
Branches: MAIN
Diff to: previous 1.14: preferred, colored
Changes since revision 1.14: +63 -50 lines
New approach to the PCI bus configuration mechanism probe problem: - try to make sure there is any kind of PCI device - if there is anything at port 0x0cf8, then check for mech. 1 or 2
Revision 1.14: download - view: text, markup, annotated - select for diffs
Mon Sep 18 21:48:39 1995 UTC (16 years, 4 months ago) by se
Branches: MAIN
Diff to: previous 1.13: preferred, colored
Changes since revision 1.13: +52 -18 lines
Revert most changes of previous commit. Changes relative to 1.12: - Put extra instruction between outl()/inl() sequence to prevent the old value being read back because of the bus capacitance. - Additional check for existence of register at CONF2_ENABLE_PORT.
Revision 1.13: download - view: text, markup, annotated - select for diffs
Fri Sep 15 21:43:45 1995 UTC (16 years, 5 months ago) by se
Branches: MAIN
Diff to: previous 1.12: preferred, colored
Changes since revision 1.12: +40 -59 lines
Another try to determine the PCI bus configuration mode (and whether there is a PCI bus at all) ... - Do not expect the chip sets to follow even very clearly expressed requirements of the PCI 2.0 spec. - Do not read back the value just written to an I/O port without making sure that some other data have crossed the bus in between ...
Revision 1.12: download - view: text, markup, annotated - select for diffs
Thu Sep 14 20:27:31 1995 UTC (16 years, 5 months ago) by se
Branches: MAIN
Diff to: previous 1.11: preferred, colored
Changes since revision 1.11: +19 -4 lines
Improved verification of configuration space accesses working: Scan for devices instead of assuming that device 0 is present on bus 0 of every PCI motherboard.
Revision 1.11: download - view: text, markup, annotated - select for diffs
Wed Sep 13 17:03:47 1995 UTC (16 years, 5 months ago) by se
Branches: MAIN
Diff to: previous 1.10: preferred, colored
Changes since revision 1.10: +35 -6 lines
Make the PCI host bridge probe code more robust when dealing with chip sets that use configuration mode 1, but still violate the PCI 2.0 specs ... (Required for the Compaq Proliant, for example.)
Revision 1.8.4.1: download - view: text, markup, annotated - select for diffs
Thu Jul 20 19:33:11 1995 UTC (16 years, 6 months ago) by davidg
Branches: old_RELENG_2_1_0
Diff to: previous 1.8: preferred, colored
Changes since revision 1.8: +18 -16 lines
Brought in changes from revs 1.9 and 1.10: Compaq/compatibility fixes and fix for Intel Aries.
Revision 1.10: download - view: text, markup, annotated - select for diffs
Fri Jun 30 16:11:42 1995 UTC (16 years, 7 months ago) by se
Branches: MAIN
Diff to: previous 1.9: preferred, colored
Changes since revision 1.9: +2 -2 lines
The PCI config mechanism 1 test failed for the Intel Aries. Make it less strict ... Submitted by: NIIMI Satoshi <sa2c@and.or.jp>
Revision 1.9: download - view: text, markup, annotated - select for diffs
Wed Jun 28 15:54:57 1995 UTC (16 years, 7 months ago) by se
Branches: MAIN
Diff to: previous 1.8: preferred, colored
Changes since revision 1.8: +17 -15 lines
PCI configuration mechanism now determined by a method, that doesn't fail on new hardware (Compaq Prolinea and Compaq Prosignea), and that doesn't erroneously identify old mech. 2 chip sets as using mech. 1. (See section 3.6.4.1.1 of the PCI bus specs rev. 2.0)
Revision 1.8: download - view: text, markup, annotated - select for diffs
Wed Mar 22 21:35:39 1995 UTC (16 years, 10 months ago) by se
Branches: MAIN
CVS tags: old_RELENG_2_1_0_BP, old_RELENG_2_0_5_RELEASE, old_RELENG_2_0_5_BP, old_RELENG_2_0_5_ALPHA, old_RELENG_2_0_5
Branch point for: old_RELENG_2_1_0
Diff to: previous 1.7: preferred, colored
Changes since revision 1.7: +3 -1 lines
Correct pcibus_setup() to return as soon as one test succeeds.
Revision 1.7: download - view: text, markup, annotated - select for diffs
Wed Mar 22 19:51:59 1995 UTC (16 years, 10 months ago) by se
Branches: MAIN
Diff to: previous 1.6: preferred, colored
Changes since revision 1.6: +1 -90 lines
Delete PCI PCI bridge simulator code ... Submitted by: Wolfgang Stanglmeier <wolf@kintaro.cologne.de>
Revision 1.6: download - view: text, markup, annotated - select for diffs
Wed Mar 22 10:52:05 1995 UTC (16 years, 10 months ago) by se
Branches: MAIN
Diff to: previous 1.5: preferred, colored
Changes since revision 1.5: +1 -3 lines
Remove spurious declaration of printf(). Submitted by: Michael Reifenberger <root@rz-wb.fh-sw.de>
Revision 1.5: download - view: text, markup, annotated - select for diffs
Tue Mar 21 23:06:07 1995 UTC (16 years, 10 months ago) by se
Branches: MAIN
Diff to: previous 1.4: preferred, colored
Changes since revision 1.4: +209 -147 lines
New ISA specific PCI code. Supports shared PCI interrupts. Submitted by: Wolfgang Stanglmeier <wolf@kintaro.cologne.de>
Revision 1.4: download - view: text, markup, annotated - select for diffs
Sun Feb 26 05:14:51 1995 UTC (16 years, 11 months ago) by bde
Branches: MAIN
Diff to: previous 1.3: preferred, colored
Changes since revision 1.3: +6 -11 lines
Replace all remaining instances of `i386/include' by `machine' and fix nearby #include inconsistencies.
Revision 1.3: download - view: text, markup, annotated - select for diffs
Sat Feb 25 17:51:18 1995 UTC (16 years, 11 months ago) by se
Branches: MAIN
Diff to: previous 1.2: preferred, colored
Changes since revision 1.2: +2 -1 lines
Keep PCI_CONF_MODE in a safe place for later reference, if #defined. Reviewed by: se Submitted by: seb@erix.ericsson.se (Sebastian Strollo)
Revision 1.2: download - view: text, markup, annotated - select for diffs
Thu Feb 9 20:16:19 1995 UTC (17 years ago) by se
Branches: MAIN
Diff to: previous 1.1: preferred, colored
Changes since revision 1.1: +5 -4 lines
Initialisation of interrupt masks changed. Reviewed by: se Submitted by: wolf (Wolfgang Stanglmeier)
Revision 1.1: download - view: text, markup, annotated - select for diffs
Wed Feb 1 23:06:58 1995 UTC (17 years ago) by se
Branches: MAIN
Reviewed by: se Submitted by: wolf (Wolfgang Stanglmeier) New ISA dependend file for PCI bus support. Replaces sys/i386/pci/pcibios.c.