CVS log for src/sys/amd64/amd64/identcpu.c
![[BACK]](/gifs/back.gif){kind=small}
Up to [FreeBSD] / src / sys / amd64 / amd64
Request diff between arbitrary revisions
Keyword substitution: kv
Default branch: MAIN
Revision 1.191.2.1.2.1: download - view: text, markup, annotated - select for diffs
Fri Nov 11 04:20:22 2011 UTC (2 months, 4 weeks ago) by kensmith
Branches: RELENG_9_0
CVS tags: RELENG_9_0_0_RELEASE
Diff to: previous 1.191.2.1: preferred, colored
Changes since revision 1.191.2.1: +0 -0 lines
SVN rev 227445 on 2011-11-11 04:20:22Z by kensmith Copy stable/9 to releng/9.0 as part of the FreeBSD 9.0-RELEASE release cycle. Approved by: re (implicit)
Revision 1.191.2.1: download - view: text, markup, annotated - select for diffs
Fri Sep 23 00:51:37 2011 UTC (4 months, 2 weeks ago) by kensmith
Branches: RELENG_9
CVS tags: RELENG_9_0_BP
Branch point for: RELENG_9_0
Diff to: previous 1.191: preferred, colored
Changes since revision 1.191: +0 -0 lines
SVN rev 225736 on 2011-09-23 00:51:37Z by kensmith Copy head to stable/9 as part of 9.0-RELEASE release cycle. Approved by: re (implicit)
Revision 1.174.2.10: download - view: text, markup, annotated - select for diffs
Fri May 20 22:38:02 2011 UTC (8 months, 3 weeks ago) by jkim
Branches: RELENG_8
Diff to: previous 1.174.2.9: preferred, colored; branchpoint 1.174: preferred, colored; next MAIN 1.175: preferred, colored
Changes since revision 1.174.2.9: +26 -27 lines
SVN rev 222153 on 2011-05-20 22:38:02Z by jkim MFC: r222043 Update CPUID bits to reflect AMD Bulldozer and Intel Sandy Bridge features.
Revision 1.154.2.17: download - view: text, markup, annotated - select for diffs
Fri May 20 22:24:26 2011 UTC (8 months, 3 weeks ago) by jkim
Branches: RELENG_7
Diff to: previous 1.154.2.16: preferred, colored; branchpoint 1.154: preferred, colored; next MAIN 1.155: preferred, colored
Changes since revision 1.154.2.16: +1 -1 lines
SVN rev 222151 on 2011-05-20 22:24:26Z by jkim MFC: r221188 Define "Hypervisor Present" bit. This bit is used by several hypervisors to identify CPUs running under emulation.
Revision 1.174.2.9: download - view: text, markup, annotated - select for diffs
Fri May 20 22:22:56 2011 UTC (8 months, 3 weeks ago) by jkim
Branches: RELENG_8
Diff to: previous 1.174.2.8: preferred, colored; branchpoint 1.174: preferred, colored
Changes since revision 1.174.2.8: +1 -1 lines
SVN rev 222150 on 2011-05-20 22:22:56Z by jkim MFC: r221188 Define "Hypervisor Present" bit. This bit is used by several hypervisors to identify CPUs running under emulation.
Revision 1.191: download - view: text, markup, annotated - select for diffs
Tue May 17 22:36:16 2011 UTC (8 months, 3 weeks ago) by jkim
Branches: MAIN
CVS tags: RELENG_9_BP, HEAD
Branch point for: RELENG_9
Diff to: previous 1.190: preferred, colored
Changes since revision 1.190: +26 -27 lines
SVN rev 222043 on 2011-05-17 22:36:16Z by jkim Update CPUID bits to reflect AMD Bulldozer and Intel Sandy Bridge features. Note AMD dropped SSE5 extensions in order to avoid ISA overlap with Intel AVX instructions. The SSE5 bit was recycled as XOP extended instruction bit, CVT16 was deprecated in favor of F16C (half-precision float conversion instructions for AVX), and the remaining FMA4 (4-operand FMA instructions) gained a separate CPUID bit. Replace non-existent references with today's CPUID specifications.
Revision 1.190: download - view: text, markup, annotated - select for diffs
Thu Apr 28 22:23:39 2011 UTC (9 months, 1 week ago) by jkim
Branches: MAIN
Diff to: previous 1.189: preferred, colored
Changes since revision 1.189: +1 -1 lines
SVN rev 221188 on 2011-04-28 22:23:39Z by jkim Define "Hypervisor Present" bit. This bit is used by several hypervisors to identify CPUs running under emulation. Currently QEMU-KVM, Xen-HVM, VMware, and MS Hyper-V are known to set this bit. MFC after: 3 days
Revision 1.189: download - view: text, markup, annotated - select for diffs
Tue Apr 12 22:15:46 2011 UTC (9 months, 4 weeks ago) by jkim
Branches: MAIN
Diff to: previous 1.188: preferred, colored
Changes since revision 1.188: +4 -1 lines
SVN rev 220579 on 2011-04-12 22:15:46Z by jkim Probe capability to find effective frequency. When the TSC is P-state invariant, APERF/MPERF ratio can be used to find effective frequency.
Revision 1.188: download - view: text, markup, annotated - select for diffs
Sat Mar 26 02:02:07 2011 UTC (10 months, 2 weeks ago) by jkim
Branches: MAIN
Diff to: previous 1.187: preferred, colored
Changes since revision 1.187: +2 -20 lines
SVN rev 220018 on 2011-03-26 02:02:07Z by jkim Improve CPU identifications of various IDT/Centaur/VIA, Rise and Transmeta CPUs. These CPUs need explicit MSR configuration to expose ceratin CPU capabilities (e.g., CMPXCHG8B) to work around compatibility issues with ancient software. Unfortunately, Rise mP6 does not set the CX8 bit in CPUID and there is no MSR to expose the feature although all mP6 processors are capable of CMPXCHG8B according to datasheets I found from the Net. Clean up and simplify VIA PadLock detection while I am in the neighborhood.
Revision 1.187: download - view: text, markup, annotated - select for diffs
Thu Mar 10 20:02:58 2011 UTC (11 months ago) by jkim
Branches: MAIN
Diff to: previous 1.186: preferred, colored
Changes since revision 1.186: +6 -4 lines
SVN rev 219461 on 2011-03-10 20:02:58Z by jkim Deprecate rarely used tsc_is_broken. Instead, we zero out tsc_freq because it is almost always used with tsc_freq any way.
Revision 1.154.2.16.2.1: download - view: text, markup, annotated - select for diffs
Tue Dec 21 17:10:29 2010 UTC (13 months, 2 weeks ago) by kensmith
Branches: RELENG_7_4
CVS tags: RELENG_7_4_0_RELEASE
Diff to: previous 1.154.2.16: preferred, colored; next MAIN 1.154.2.17: preferred, colored
Changes since revision 1.154.2.16: +0 -0 lines
SVN rev 216618 on 2010-12-21 17:10:29Z by kensmith Copy stable/7 to releng/7.4 in preparation for FreeBSD-7.4 release. Approved by: re (implicit)
Revision 1.174.2.8.2.1: download - view: text, markup, annotated - select for diffs
Tue Dec 21 17:09:25 2010 UTC (13 months, 2 weeks ago) by kensmith
Branches: RELENG_8_2
CVS tags: RELENG_8_2_0_RELEASE
Diff to: previous 1.174.2.8: preferred, colored; next MAIN 1.174.2.9: preferred, colored
Changes since revision 1.174.2.8: +0 -0 lines
SVN rev 216617 on 2010-12-21 17:09:25Z by kensmith Copy stable/8 to releng/8.2 in preparation for FreeBSD-8.2 release. Approved by: re (implicit)
Revision 1.186: download - view: text, markup, annotated - select for diffs
Tue Dec 7 22:43:25 2010 UTC (14 months ago) by jkim
Branches: MAIN
Diff to: previous 1.185: preferred, colored
Changes since revision 1.185: +2 -4 lines
SVN rev 216276 on 2010-12-07 22:43:25Z by jkim Remove stale comments about P-state invariant TSC and fix style(9) nits.
Revision 1.185: download - view: text, markup, annotated - select for diffs
Tue Dec 7 22:34:51 2010 UTC (14 months ago) by jkim
Branches: MAIN
Diff to: previous 1.184: preferred, colored
Changes since revision 1.184: +16 -4 lines
SVN rev 216275 on 2010-12-07 22:34:51Z by jkim Do not register a event handler for CPU freqency changes when it is found P-state invariant. This is continuation of r216274.
Revision 1.184: download - view: text, markup, annotated - select for diffs
Tue Dec 7 22:12:02 2010 UTC (14 months ago) by jkim
Branches: MAIN
Diff to: previous 1.183: preferred, colored
Changes since revision 1.183: +0 -22 lines
SVN rev 216272 on 2010-12-07 22:12:02Z by jkim Probe P-state invariant TSC from rightful place.
Revision 1.174.2.8: download - view: text, markup, annotated - select for diffs
Tue Oct 12 09:10:24 2010 UTC (15 months, 4 weeks ago) by kib
Branches: RELENG_8
CVS tags: RELENG_8_2_BP
Branch point for: RELENG_8_2
Diff to: previous 1.174.2.7: preferred, colored; branchpoint 1.174: preferred, colored
Changes since revision 1.174.2.7: +1 -1 lines
SVN rev 213715 on 2010-10-12 09:10:24Z by kib MFC r213452: Display PCID capability of CPU and add CPUID define for it.
Revision 1.183: download - view: text, markup, annotated - select for diffs
Tue Oct 5 15:31:56 2010 UTC (16 months ago) by kib
Branches: MAIN
Diff to: previous 1.182: preferred, colored
Changes since revision 1.182: +1 -1 lines
SVN rev 213452 on 2010-10-05 15:31:56Z by kib Display PCID capability of CPU and add CPUID define for it. MFC after: 1 week
Revision 1.174.2.7: download - view: text, markup, annotated - select for diffs
Thu Aug 5 08:57:53 2010 UTC (18 months ago) by kib
Branches: RELENG_8
Diff to: previous 1.174.2.6: preferred, colored; branchpoint 1.174: preferred, colored
Changes since revision 1.174.2.6: +24 -2 lines
SVN rev 210855 on 2010-08-05 08:57:53Z by kib MFC r210369: When compat32 binary asks for the value of hw.machine_arch, report the name of 32bit sibling architecture instead of the host one.
Revision 1.182: download - view: text, markup, annotated - select for diffs
Thu Jul 22 09:13:49 2010 UTC (18 months, 2 weeks ago) by kib
Branches: MAIN
Diff to: previous 1.181: preferred, colored
Changes since revision 1.181: +24 -2 lines
SVN rev 210369 on 2010-07-22 09:13:49Z by kib When compat32 binary asks for the value of hw.machine_arch, report the name of 32bit sibling architecture instead of the host one. Do the same for hw.machine on amd64. Add a safety belt debug.adaptive_machine_arch sysctl, to turn the substitution off. Reviewed by: jhb, nwhitehorn MFC after: 2 weeks
Revision 1.174.2.6.2.1: download - view: text, markup, annotated - select for diffs
Mon Jun 14 02:09:06 2010 UTC (19 months, 3 weeks ago) by kensmith
Branches: RELENG_8_1
CVS tags: RELENG_8_1_0_RELEASE
Diff to: previous 1.174.2.6: preferred, colored; next MAIN 1.174.2.7: preferred, colored
Changes since revision 1.174.2.6: +0 -0 lines
SVN rev 209145 on 2010-06-14 02:09:06Z by kensmith Copy stable/8 to releng/8.1 in preparation for 8.1-RC1. Approved by: re (implicit)
Revision 1.174.2.6: download - view: text, markup, annotated - select for diffs
Wed May 12 09:34:10 2010 UTC (20 months, 4 weeks ago) by kib
Branches: RELENG_8
CVS tags: RELENG_8_1_BP
Branch point for: RELENG_8_1
Diff to: previous 1.174.2.5: preferred, colored; branchpoint 1.174: preferred, colored
Changes since revision 1.174.2.5: +2 -2 lines
SVN rev 207955 on 2010-05-12 09:34:10Z by kib MFC r207676: Add definitions for Intel AESNI CPUID bits and print the capabilities on boot.
Revision 1.181: download - view: text, markup, annotated - select for diffs
Wed May 5 21:07:47 2010 UTC (21 months ago) by kib
Branches: MAIN
Diff to: previous 1.180: preferred, colored
Changes since revision 1.180: +2 -2 lines
SVN rev 207676 on 2010-05-05 21:07:47Z by kib Add definitions for Intel AESNI CPUID bits and print the capabilities on boot. Hardware provided by: Sentex Communications MFC after: 1 week
Revision 1.154.2.16: download - view: text, markup, annotated - select for diffs
Thu Mar 25 15:53:02 2010 UTC (22 months, 2 weeks ago) by jhb
Branches: RELENG_7
CVS tags: RELENG_7_4_BP
Branch point for: RELENG_7_4
Diff to: previous 1.154.2.15: preferred, colored; branchpoint 1.154: preferred, colored
Changes since revision 1.154.2.15: +3 -1 lines
SVN rev 205646 on 2010-03-25 15:53:02Z by jhb MFC 205013: Print out the family and model from the cpu_id. This is especially useful given the advent of the extended family and extended model fields. The values are printed in hex to match their common usage in documentation.
Revision 1.174.2.5: download - view: text, markup, annotated - select for diffs
Thu Mar 25 15:48:23 2010 UTC (22 months, 2 weeks ago) by jhb
Branches: RELENG_8
Diff to: previous 1.174.2.4: preferred, colored; branchpoint 1.174: preferred, colored
Changes since revision 1.174.2.4: +3 -1 lines
SVN rev 205645 on 2010-03-25 15:48:23Z by jhb MFC 205013: Print out the family and model from the cpu_id. This is especially useful given the advent of the extended family and extended model fields. The values are printed in hex to match their common usage in documentation.
Revision 1.180: download - view: text, markup, annotated - select for diffs
Thu Mar 11 14:17:37 2010 UTC (23 months ago) by jhb
Branches: MAIN
Diff to: previous 1.179: preferred, colored
Changes since revision 1.179: +3 -1 lines
SVN rev 205013 on 2010-03-11 14:17:37Z by jhb Print out the family and model from the cpu_id. This is especially useful given the advent of the extended family and extended model fields. The values are printed in hex to match their common usage in documentation. Submitted by: Alexander Best MFC after: 1 week
Revision 1.179: download - view: text, markup, annotated - select for diffs
Thu Feb 25 14:13:39 2010 UTC (23 months, 2 weeks ago) by attilio
Branches: MAIN
Diff to: previous 1.178: preferred, colored
Changes since revision 1.178: +1 -1 lines
SVN rev 204309 on 2010-02-25 14:13:39Z by attilio Introduce the new kernel sub-tree x86 which should contain all the code shared and generalized between our current amd64, i386 and pc98. This is just an initial step that should lead to a more complete effort. For the moment, a very simple porting of cpufreq modules, BIOS calls and the whole MD specific ISA bus part is added to the sub-tree but ideally a lot of code might be added and more shared support should grow. Sponsored by: Sandvine Incorporated Reviewed by: emaste, kib, jhb, imp Discussed on: arch MFC: 3 weeks
Revision 1.154.2.15.2.1: download - view: text, markup, annotated - select for diffs
Wed Feb 10 00:26:20 2010 UTC (23 months, 4 weeks ago) by kensmith
Branches: RELENG_7_3
CVS tags: RELENG_7_3_0_RELEASE
Diff to: previous 1.154.2.15: preferred, colored; next MAIN 1.154.2.16: preferred, colored
Changes since revision 1.154.2.15: +0 -0 lines
SVN rev 203736 on 2010-02-10 00:26:20Z by kensmith Copy stable/7 to releng/7.3 as part of the 7.3-RELEASE process. Approved by: re (implicit)
Revision 1.154.2.15: download - view: text, markup, annotated - select for diffs
Sun Dec 20 01:00:41 2009 UTC (2 years, 1 month ago) by avg
Branches: RELENG_7
CVS tags: RELENG_7_3_BP
Branch point for: RELENG_7_3
Diff to: previous 1.154.2.14: preferred, colored; branchpoint 1.154: preferred, colored
Changes since revision 1.154.2.14: +9 -9 lines
SVN rev 200742 on 2009-12-20 01:00:41Z by avg MFC r197070: Consolidate CPUID to CPU family/model macros for amd64 and i386 This is to fix breakage caused by r200064. I do this MFC instead of just fixing r200064 to reduce difference from head and make things easier for future MFCs. Original change is by jkim. Pointy hat to: avg
Revision 1.154.2.14: download - view: text, markup, annotated - select for diffs
Tue Dec 8 15:29:12 2009 UTC (2 years, 2 months ago) by avg
Branches: RELENG_7
Diff to: previous 1.154.2.13: preferred, colored; branchpoint 1.154: preferred, colored
Changes since revision 1.154.2.13: +1 -1 lines
SVN rev 200263 on 2009-12-08 15:29:12Z by avg MFC r199968: x86 cpu features: add MOVBE reporting and flag
Revision 1.174.2.4: download - view: text, markup, annotated - select for diffs
Tue Dec 8 15:27:06 2009 UTC (2 years, 2 months ago) by avg
Branches: RELENG_8
Diff to: previous 1.174.2.3: preferred, colored; branchpoint 1.174: preferred, colored
Changes since revision 1.174.2.3: +1 -1 lines
SVN rev 200262 on 2009-12-08 15:27:06Z by avg MFC r199968: x86 cpu features: add MOVBE reporting and flag
Revision 1.178: download - view: text, markup, annotated - select for diffs
Mon Nov 30 11:11:08 2009 UTC (2 years, 2 months ago) by avg
Branches: MAIN
Diff to: previous 1.177: preferred, colored
Changes since revision 1.177: +1 -1 lines
SVN rev 199968 on 2009-11-30 11:11:08Z by avg x86 cpu features: add MOVBE reporting and flag The check is glimpsed from Linux and OpenSolaris. MOVBE instruction is found in Intel Atom processors.
Revision 1.174.2.1.2.3: download - view: text, markup, annotated - select for diffs
Fri Nov 6 17:09:04 2009 UTC (2 years, 3 months ago) by attilio
Branches: RELENG_8_0
CVS tags: RELENG_8_0_0_RELEASE
Diff to: previous 1.174.2.1.2.2: preferred, colored; branchpoint 1.174.2.1: preferred, colored; next MAIN 1.174.2.2: preferred, colored
Changes since revision 1.174.2.1.2.2: +7 -7 lines
SVN rev 198991 on 2009-11-06 17:09:04Z by attilio MFC r197070: Consolidate CPUID to CPU family/model macros for amd64 and i386 to reduce unnecessary #ifdef's for shared code between them. This MFC should unbreak the kernel build breakage introduced by r198978. Reported by: kib Pointy hat to: me Approved by: re (kib)
Revision 1.174.2.3: download - view: text, markup, annotated - select for diffs
Fri Nov 6 15:24:48 2009 UTC (2 years, 3 months ago) by attilio
Branches: RELENG_8
Diff to: previous 1.174.2.2: preferred, colored; branchpoint 1.174: preferred, colored
Changes since revision 1.174.2.2: +7 -7 lines
SVN rev 198989 on 2009-11-06 15:24:48Z by attilio MFC r197070: Consolidate CPUID to CPU family/model macros for amd64 and i386 to reduce unnecessary #ifdef's for shared code between them. This MFC should unbreak the kernel build breakage introduced by r198977. Reported by: kib Pointy hat to: me
Revision 1.154.2.13: download - view: text, markup, annotated - select for diffs
Fri Nov 6 10:38:33 2009 UTC (2 years, 3 months ago) by attilio
Branches: RELENG_7
Diff to: previous 1.154.2.12: preferred, colored; branchpoint 1.154: preferred, colored
Changes since revision 1.154.2.12: +15 -0 lines
SVN rev 198979 on 2009-11-06 10:38:33Z by attilio MFC r198868, r198950: Opteron rev E family of processor expose a bug where acq memory barriers can be broken, resulting in random breakages. Printout a warning message if affected family and model are found.
Revision 1.174.2.1.2.2: download - view: text, markup, annotated - select for diffs
Fri Nov 6 10:17:08 2009 UTC (2 years, 3 months ago) by attilio
Branches: RELENG_8_0
Diff to: previous 1.174.2.1.2.1: preferred, colored; branchpoint 1.174.2.1: preferred, colored
Changes since revision 1.174.2.1.2.1: +15 -0 lines
SVN rev 198978 on 2009-11-06 10:17:08Z by attilio MFC r198868, r198950: Opteron rev E family of processor expose a bug where acq memory barriers can be broken, resulting in random breakages. Printout a warning message if affected family and model are found. Approved by: re (kib)
Revision 1.174.2.2: download - view: text, markup, annotated - select for diffs
Fri Nov 6 10:15:15 2009 UTC (2 years, 3 months ago) by attilio
Branches: RELENG_8
Diff to: previous 1.174.2.1: preferred, colored; branchpoint 1.174: preferred, colored
Changes since revision 1.174.2.1: +15 -0 lines
SVN rev 198977 on 2009-11-06 10:15:15Z by attilio MFC r198868, r198950: Opteron rev E family of processor expose a bug where acq memory barriers can be broken, resulting in random breakages. Printout a warning message if affecred family and model are found.
Revision 1.177: download - view: text, markup, annotated - select for diffs
Thu Nov 5 14:34:38 2009 UTC (2 years, 3 months ago) by attilio
Branches: MAIN
Diff to: previous 1.176: preferred, colored
Changes since revision 1.176: +1 -4 lines
SVN rev 198950 on 2009-11-05 14:34:38Z by attilio Strip from messages for users external URLs the project cannot directly control. Requested by: kib, rwatson
Revision 1.176: download - view: text, markup, annotated - select for diffs
Wed Nov 4 01:32:59 2009 UTC (2 years, 3 months ago) by attilio
Branches: MAIN
Diff to: previous 1.175: preferred, colored
Changes since revision 1.175: +18 -0 lines
SVN rev 198868 on 2009-11-04 01:32:59Z by attilio Opteron rev E family of processor expose a bug where, in very rare ocassions, memory barriers semantic is not honoured by the hardware itself. As a result, some random breakage can happen in uninvestigable ways (for further explanation see at the content of the commit itself). As long as just a specific familly is bugged of an entire architecture is broken, a complete fix-up is impratical without harming to some extents the other correct cases. Considering that (and considering the frequency of the bug exposure) just print out a warning message if the affected machine is identified. Pointed out by: Samy Al Bahra <sbahra at repnop dot org> Help on wordings by: jeff MFC: 3 days
Revision 1.174.2.1.2.1: download - view: text, markup, annotated - select for diffs
Sun Oct 25 01:10:29 2009 UTC (2 years, 3 months ago) by kensmith
Branches: RELENG_8_0
Diff to: previous 1.174.2.1: preferred, colored
Changes since revision 1.174.2.1: +0 -0 lines
SVN rev 198460 on 2009-10-25 01:10:29Z by kensmith Copy stable/8 to releng/8.0 as part of 8.0-RELEASE release procedure. Approved by: re (implicit)
Revision 1.175: download - view: text, markup, annotated - select for diffs
Thu Sep 10 17:27:36 2009 UTC (2 years, 4 months ago) by jkim
Branches: MAIN
Diff to: previous 1.174: preferred, colored
Changes since revision 1.174: +7 -7 lines
SVN rev 197070 on 2009-09-10 17:27:36Z by jkim Consolidate CPUID to CPU family/model macros for amd64 and i386 to reduce unnecessary #ifdef's for shared code between them.
Revision 1.174.2.1: download - view: text, markup, annotated - select for diffs
Mon Aug 3 08:13:06 2009 UTC (2 years, 6 months ago) by kensmith
Branches: RELENG_8
CVS tags: RELENG_8_0_BP
Branch point for: RELENG_8_0
Diff to: previous 1.174: preferred, colored
Changes since revision 1.174: +0 -0 lines
SVN rev 196045 on 2009-08-03 08:13:06Z by kensmith Copy head to stable/8 as part of 8.0 Release cycle. Approved by: re (Implicit)
Revision 1.154.2.12: download - view: text, markup, annotated - select for diffs
Tue Jul 14 18:40:31 2009 UTC (2 years, 6 months ago) by jkim
Branches: RELENG_7
Diff to: previous 1.154.2.11: preferred, colored; branchpoint 1.154: preferred, colored
Changes since revision 1.154.2.11: +16 -0 lines
SVN rev 195687 on 2009-07-14 18:40:31Z by jkim MFC: r191788 Unlock the largest standard CPUID on Intel CPUs for both amd64 and i386. On i386, we extend it to cover Core, Core 2, and Core i7 processors, not just Pentium 4 family, and move it to better place. On amd64, all supported Intel CPUs should have this MSR.
Revision 1.154.2.11: download - view: text, markup, annotated - select for diffs
Tue Jul 14 17:37:59 2009 UTC (2 years, 6 months ago) by jkim
Branches: RELENG_7
Diff to: previous 1.154.2.10: preferred, colored; branchpoint 1.154: preferred, colored
Changes since revision 1.154.2.10: +60 -11 lines
SVN rev 195686 on 2009-07-14 17:37:59Z by jkim MFC: r187109, r187112 r187109 - Add basic amd64 support for VIA Nano processors. r187112 - Connect padlock(4) to amd64 build for VIA Nano processors.
Revision 1.154.2.10: download - view: text, markup, annotated - select for diffs
Mon Jul 13 22:13:13 2009 UTC (2 years, 6 months ago) by jkim
Branches: RELENG_7
Diff to: previous 1.154.2.9: preferred, colored; branchpoint 1.154: preferred, colored
Changes since revision 1.154.2.9: +7 -0 lines
SVN rev 195667 on 2009-07-13 22:13:13Z by jkim MFC: Replace remaining cpu_vendor with cpu_vendor_id and add basic VIA Nano processor support for amd64 and i386. r186797 - Add Centaur/IDT/VIA vendor ID for Nano family. r187101 - Allow VIA Nano processors to boot FreeBSD/amd64. r187117 - Replace more cpu_vendor with cpu_vendor_id. r187118 - Add basic i386 support for VIA Nano processors. r187157 - Enable MSI support for VIA Nano processors on i386. r187594 - Replace more cpu_vendor with cpu_vendor_id. r187597 - Include a missing header file. r187598 - VIA Nano processor has P-state invariant TSC. r187633 - Add more VIA bridges to agp_via.c.
Revision 1.154.2.9: download - view: text, markup, annotated - select for diffs
Tue Jun 30 17:19:11 2009 UTC (2 years, 7 months ago) by avg
Branches: RELENG_7
Diff to: previous 1.154.2.8: preferred, colored; branchpoint 1.154: preferred, colored
Changes since revision 1.154.2.8: +5 -1 lines
SVN rev 195198 on 2009-06-30 17:19:11Z by avg MFC 185460 (mav): improve invariant TSC detection for Intel CPUs Nod from: mav
Revision 1.154.2.8: download - view: text, markup, annotated - select for diffs
Tue Jun 30 17:10:08 2009 UTC (2 years, 7 months ago) by avg
Branches: RELENG_7
Diff to: previous 1.154.2.7: preferred, colored; branchpoint 1.154: preferred, colored
Changes since revision 1.154.2.7: +48 -21 lines
SVN rev 195197 on 2009-06-30 17:10:08Z by avg MFC 185295, 185341, 185343: cpu identification improvements Goal of this MFC is to minimize unnecessary code differences between head and the branch, and to improve/fix invariant TSC detection for a wide range of CPUs. 185295 by takawata: Honor AMDPM_TSC_INVARIANT for Intel CPUs (i386 only) 185341 by jkim: Introduce cpu_vendor_id... 185343 by jkim: Use newly introduced cpu_vendor_id... These revision are bundled together because all intermediate revisions have one or more of the following deficiencies: o AMDPM_TSC_INVARIANT bit (CPUID.0x80000007.EDX[8]) is not honored for Intel CPUs; o AMD-specific CPU model/revision checks are performed on Intel CPUs. Nod from: jkim
Revision 1.154.2.7: download - view: text, markup, annotated - select for diffs
Tue Jun 30 14:11:43 2009 UTC (2 years, 7 months ago) by avg
Branches: RELENG_7
Diff to: previous 1.154.2.6: preferred, colored; branchpoint 1.154: preferred, colored
Changes since revision 1.154.2.6: +0 -32 lines
SVN rev 195193 on 2009-06-30 14:11:43Z by avg MFC 179229 (alc), 195188: The VM system no longer uses setPQL2(). Remove it and its helpers. Drop unused extern declarations in amd64 that seem to have been related. Reviewed by: alc
Revision 1.174: download - view: text, markup, annotated - select for diffs
Tue Jun 30 11:16:32 2009 UTC (2 years, 7 months ago) by avg
Branches: MAIN
CVS tags: RELENG_8_BP
Branch point for: RELENG_8
Diff to: previous 1.173: preferred, colored
Changes since revision 1.173: +0 -3 lines
SVN rev 195188 on 2009-06-30 11:16:32Z by avg remove unused/unneeded extern declarations This should result in no changes to compiled code. Reviewed by: alc Approved by: re (kib) MFC after: 1 day
Revision 1.154.2.6: download - view: text, markup, annotated - select for diffs
Fri Jun 12 20:41:44 2009 UTC (2 years, 7 months ago) by jkim
Branches: RELENG_7
Diff to: previous 1.154.2.5: preferred, colored; branchpoint 1.154: preferred, colored
Changes since revision 1.154.2.5: +13 -13 lines
SVN rev 194075 on 2009-06-12 20:41:44Z by jkim MFC: r175904, r175905, r186009 Sync amd64 and i386 CPUID feature flags with -CURRENT. - amd64 only: DTES64, SSE4.1, SSE4.2, x2APIC, POPCNT - both: ABM, SSE4A, MAS, OSVW, IBS, SSE5, SKINIT, WDT PR: kern/135202
Revision 1.173: download - view: text, markup, annotated - select for diffs
Mon May 4 18:05:27 2009 UTC (2 years, 9 months ago) by jkim
Branches: MAIN
Diff to: previous 1.172: preferred, colored
Changes since revision 1.172: +16 -0 lines
SVN rev 191788 on 2009-05-04 18:05:27Z by jkim Unlock the largest standard CPUID on Intel CPUs for both amd64 and i386 and fix SMP topology detection. On i386, we extend it to cover Core, Core 2, and Core i7 processors, not just Pentium 4 family, and move it to better place. On amd64, all supported Intel CPUs should have this MSR.
Revision 1.172: download - view: text, markup, annotated - select for diffs
Wed Apr 29 06:54:40 2009 UTC (2 years, 9 months ago) by jeff
Branches: MAIN
Diff to: previous 1.171: preferred, colored
Changes since revision 1.171: +0 -26 lines
SVN rev 191648 on 2009-04-29 06:54:40Z by jeff - Add support for cpuid leaf 0xb. This allows us to determine the topology of nehalem/corei7 based systems. - Remove the cpu_cores/cpu_logical detection from identcpu. - Describe the layout of the system in cpu_mp_announce(). Sponsored by: Nokia
Revision 1.154.2.5.2.1: download - view: text, markup, annotated - select for diffs
Wed Apr 15 03:14:26 2009 UTC (2 years, 9 months ago) by kensmith
Branches: RELENG_7_2
CVS tags: RELENG_7_2_0_RELEASE
Diff to: previous 1.154.2.5: preferred, colored; next MAIN 1.154.2.6: preferred, colored
Changes since revision 1.154.2.5: +0 -0 lines
SVN rev 191087 on 2009-04-15 03:14:26Z by kensmith Create releng/7.2 from stable/7 in preparation for 7.2-RELEASE. Approved by: re (implicit)
Revision 1.171: download - view: text, markup, annotated - select for diffs
Thu Jan 22 21:04:46 2009 UTC (3 years ago) by jkim
Branches: MAIN
Diff to: previous 1.170: preferred, colored
Changes since revision 1.170: +2 -1 lines
SVN rev 187598 on 2009-01-22 21:04:46Z by jkim VIA Nano processor has a special MSR (CENT_HARDWARECTRL3) bit 32 to determine whether TSC is P-state invariant or not. In fact, this MSR is writable but we just leave it at the BIOS default for now.
Revision 1.154.2.5: download - view: text, markup, annotated - select for diffs
Wed Jan 21 21:28:21 2009 UTC (3 years ago) by jkim
Branches: RELENG_7
CVS tags: RELENG_7_2_BP
Branch point for: RELENG_7_2
Diff to: previous 1.154.2.4: preferred, colored; branchpoint 1.154: preferred, colored
Changes since revision 1.154.2.4: +9 -2 lines
SVN rev 187572 on 2009-01-21 21:28:21Z by jkim MFC: Set tsc_is_invariant for some known AMD CPUs even if BIOS does not advertise it.
Revision 1.154.2.4: download - view: text, markup, annotated - select for diffs
Wed Jan 21 20:53:36 2009 UTC (3 years ago) by jkim
Branches: RELENG_7
Diff to: previous 1.154.2.3: preferred, colored; branchpoint 1.154: preferred, colored
Changes since revision 1.154.2.3: +11 -2 lines
SVN rev 187567 on 2009-01-21 20:53:36Z by jkim MFC: Turn off CPU frequency change notifiers when the TSC is P-state invariant or it is forced by setting 'kern.timecounter.invariant_tsc' tunable to non-zero.
Revision 1.154.2.3: download - view: text, markup, annotated - select for diffs
Wed Jan 21 20:16:11 2009 UTC (3 years ago) by jkim
Branches: RELENG_7
Diff to: previous 1.154.2.2: preferred, colored; branchpoint 1.154: preferred, colored
Changes since revision 1.154.2.2: +4 -0 lines
SVN rev 187565 on 2009-01-21 20:16:11Z by jkim MFC: Detect Advanced Power Management Information for AMD CPUs.
Revision 1.154.2.2: download - view: text, markup, annotated - select for diffs
Sun Jan 18 12:16:45 2009 UTC (3 years ago) by stas
Branches: RELENG_7
Diff to: previous 1.154.2.1: preferred, colored; branchpoint 1.154: preferred, colored
Changes since revision 1.154.2.1: +2 -2 lines
SVN rev 187390 on 2009-01-18 12:16:45Z by stas - Merge r183151: Recognize SAVE and OSXSAVE extended processor features.
Revision 1.170: download - view: text, markup, annotated - select for diffs
Mon Jan 12 19:17:35 2009 UTC (3 years ago) by jkim
Branches: MAIN
Diff to: previous 1.169: preferred, colored
Changes since revision 1.169: +65 -11 lines
SVN rev 187109 on 2009-01-12 19:17:35Z by jkim Add basic amd64 support for VIA Nano processors.
Revision 1.169: download - view: text, markup, annotated - select for diffs
Mon Jan 5 21:51:49 2009 UTC (3 years, 1 month ago) by jkim
Branches: MAIN
Diff to: previous 1.168: preferred, colored
Changes since revision 1.168: +1 -0 lines
SVN rev 186797 on 2009-01-05 21:51:49Z by jkim Add Centaur/IDT/VIA vendor ID for Nano family, which has long mode support.
Revision 1.168: download - view: text, markup, annotated - select for diffs
Fri Dec 12 23:17:00 2008 UTC (3 years, 1 month ago) by jkim
Branches: MAIN
Diff to: previous 1.167: preferred, colored
Changes since revision 1.167: +8 -8 lines
SVN rev 186009 on 2008-12-12 23:17:00Z by jkim Add more CPUID bits from AMD CPUID Specification Rev. 2.28.
Revision 1.167: download - view: text, markup, annotated - select for diffs
Sun Nov 30 00:10:55 2008 UTC (3 years, 2 months ago) by mav
Branches: MAIN
Diff to: previous 1.166: preferred, colored
Changes since revision 1.166: +5 -1 lines
SVN rev 185460 on 2008-11-30 00:10:55Z by mav According to "Intel 64 and IA-32 Architectures Software Developer's Manual Volume 3B: System Programming Guide, Part 2", CPUs with family 0x6 and model above or 0xE and CPUs with family 0xF and model above or 0x3 have invariant TSC.
Revision 1.166: download - view: text, markup, annotated - select for diffs
Wed Nov 26 19:29:33 2008 UTC (3 years, 2 months ago) by jkim
Branches: MAIN
Diff to: previous 1.165: preferred, colored
Changes since revision 1.165: +13 -7 lines
SVN rev 185343 on 2008-11-26 19:29:33Z by jkim Use newly introduced cpu_vendor_id to make invariant TSC detection more clearer and merge r185295 to amd64.
Revision 1.165: download - view: text, markup, annotated - select for diffs
Wed Nov 26 19:25:13 2008 UTC (3 years, 2 months ago) by jkim
Branches: MAIN
Diff to: previous 1.164: preferred, colored
Changes since revision 1.164: +36 -15 lines
SVN rev 185341 on 2008-11-26 19:25:13Z by jkim Introduce cpu_vendor_id and replace a lot of strcmp(cpu_vendor, "..."). Reviewed by: jhb, peter (early amd64 version)
Revision 1.154.2.1.2.1: download - view: text, markup, annotated - select for diffs
Tue Nov 25 02:59:29 2008 UTC (3 years, 2 months ago) by kensmith
Branches: RELENG_7_1
CVS tags: RELENG_7_1_0_RELEASE
Diff to: previous 1.154.2.1: preferred, colored; next MAIN 1.154.2.2: preferred, colored
Changes since revision 1.154.2.1: +0 -0 lines
SVN rev 185281 on 2008-11-25 02:59:29Z by kensmith Create releng/7.1 in preparation for moving into RC phase of 7.1 release cycle. Approved by: re (implicit)
Revision 1.164: download - view: text, markup, annotated - select for diffs
Wed Oct 22 17:30:37 2008 UTC (3 years, 3 months ago) by jkim
Branches: MAIN
Diff to: previous 1.163: preferred, colored
Changes since revision 1.163: +7 -2 lines
SVN rev 184169 on 2008-10-22 17:30:37Z by jkim Add AMD Family 0Fh, Model 6Bh, Stepping 2 to the list of invariant TSCs and fix i386 test.
Revision 1.163: download - view: text, markup, annotated - select for diffs
Wed Oct 22 00:01:53 2008 UTC (3 years, 3 months ago) by jkim
Branches: MAIN
Diff to: previous 1.162: preferred, colored
Changes since revision 1.162: +3 -1 lines
SVN rev 184146 on 2008-10-22 00:01:53Z by jkim Set kern.timecounter.invariant_tsc to 1 for AMD CPU family 10h and higher even if BIOS does not advertise it.
Revision 1.162: download - view: text, markup, annotated - select for diffs
Tue Oct 21 00:38:00 2008 UTC (3 years, 3 months ago) by jkim
Branches: MAIN
Diff to: previous 1.161: preferred, colored
Changes since revision 1.161: +11 -2 lines
SVN rev 184102 on 2008-10-21 00:38:00Z by jkim Turn off CPU frequency change notifiers when the TSC is P-state invariant or it is forced by setting 'kern.timecounter.invariant_tsc' tunable to non-zero.
Revision 1.161: download - view: text, markup, annotated - select for diffs
Tue Oct 21 00:17:55 2008 UTC (3 years, 3 months ago) by jkim
Branches: MAIN
Diff to: previous 1.160: preferred, colored
Changes since revision 1.160: +4 -0 lines
SVN rev 184101 on 2008-10-21 00:17:55Z by jkim Detect Advanced Power Management Information for AMD CPUs.
Revision 1.136.2.5.4.1: download - view: text, markup, annotated - select for diffs
Thu Oct 2 02:57:24 2008 UTC (3 years, 4 months ago) by kensmith
Branches: RELENG_6_4
CVS tags: RELENG_6_4_0_RELEASE
Diff to: previous 1.136.2.5: preferred, colored; next MAIN 1.137: preferred, colored
Changes since revision 1.136.2.5: +0 -0 lines
SVN rev 183531 on 2008-10-02 02:57:24Z by kensmith Create releng/6.4 from stable/6 in preparation for 6.4-RC1. Approved by: re (implicit)
Revision 1.160: download - view: text, markup, annotated - select for diffs
Thu Sep 18 18:51:32 2008 UTC (3 years, 4 months ago) by stas
Branches: MAIN
Diff to: previous 1.159: preferred, colored
Changes since revision 1.159: +2 -2 lines
SVN rev 183151 on 2008-09-18 18:51:32Z by stas - Recognize SAVE and OSXSAVE extended processor features. Approved by: kib (mentor) MFC after: 1 month
Revision 1.154.2.1: download - view: text, markup, annotated - select for diffs
Wed Sep 17 20:49:42 2008 UTC (3 years, 4 months ago) by jhb
Branches: RELENG_7
CVS tags: RELENG_7_1_BP
Branch point for: RELENG_7_1
Diff to: previous 1.154: preferred, colored
Changes since revision 1.154: +1 -1 lines
SVN rev 183129 on 2008-09-17 20:49:42Z by jhb MFC: Recognize architectural support for 1GB virtual pages. Approved by: re (kib), alc
Revision 1.159: download - view: text, markup, annotated - select for diffs
Fri May 23 04:03:52 2008 UTC (3 years, 8 months ago) by alc
Branches: MAIN
Diff to: previous 1.158: preferred, colored
Changes since revision 1.158: +0 -29 lines
The VM system no longer uses setPQL2(). Remove it and its helpers.
Revision 1.158: download - view: text, markup, annotated - select for diffs
Sun Mar 2 07:58:40 2008 UTC (3 years, 11 months ago) by jeff
Branches: MAIN
Diff to: previous 1.157: preferred, colored
Changes since revision 1.157: +7 -1 lines
- Remove the old smp cpu topology specification with a new, more flexible tree structure that encodes the level of cache sharing and other properties. - Provide several convenience functions for creating one and two level cpu trees as well as a default flat topology. The system now always has some topology. - On i386 and amd64 create a seperate level in the hierarchy for HTT and multi-core cpus. This will allow the scheduler to intelligently load balance non-uniform cores. Presently we don't detect what level of the cache hierarchy is shared at each level in the topology. - Add a mechanism for testing common topologies that have more information than the MD code is able to provide via the kern.smp.topology tunable. This should be considered a debugging tool only and not a stable api. Sponsored by: Nokia
Revision 1.157: download - view: text, markup, annotated - select for diffs
Sat Feb 2 23:17:27 2008 UTC (4 years ago) by das
Branches: MAIN
Diff to: previous 1.156: preferred, colored
Changes since revision 1.156: +2 -2 lines
Add a few more CPUID feature bits while here. We don't support these features yet.
Revision 1.156: download - view: text, markup, annotated - select for diffs
Sat Feb 2 22:40:17 2008 UTC (4 years ago) by das
Branches: MAIN
Diff to: previous 1.155: preferred, colored
Changes since revision 1.155: +3 -3 lines
SSE4 CPUID bits
Revision 1.155: download - view: text, markup, annotated - select for diffs
Sat Dec 8 21:13:01 2007 UTC (4 years, 2 months ago) by alc
Branches: MAIN
Diff to: previous 1.154: preferred, colored
Changes since revision 1.154: +1 -1 lines
Recognize architectural support for 1GB virtual pages. MFC after: 6 weeks
Revision 1.136.2.5: download - view: text, markup, annotated - select for diffs
Fri Sep 28 08:26:16 2007 UTC (4 years, 4 months ago) by des
Branches: RELENG_6
CVS tags: RELENG_6_4_BP, RELENG_6_3_BP, RELENG_6_3_0_RELEASE, RELENG_6_3
Branch point for: RELENG_6_4
Diff to: previous 1.136.2.4: preferred, colored; branchpoint 1.136: preferred, colored; next MAIN 1.137: preferred, colored
Changes since revision 1.136.2.4: +8 -13 lines
MFC: remove confusing boot message, add feature bits
Revision 1.154: download - view: text, markup, annotated - select for diffs
Wed May 30 14:23:26 2007 UTC (4 years, 8 months ago) by des
Branches: MAIN
CVS tags: RELENG_7_BP, RELENG_7_0_BP, RELENG_7_0_0_RELEASE, RELENG_7_0
Branch point for: RELENG_7
Diff to: previous 1.153: preferred, colored
Changes since revision 1.153: +2 -7 lines
MFi386: PDCM, remove pointless message MFC after: 3 days
Revision 1.153: download - view: text, markup, annotated - select for diffs
Mon Mar 26 18:03:29 2007 UTC (4 years, 10 months ago) by njl
Branches: MAIN
Diff to: previous 1.152: preferred, colored
Changes since revision 1.152: +17 -0 lines
Add an interface for drivers to be notified of changes to CPU frequency. cpufreq_pre_change is called before the change, giving each driver a chance to revoke the change. cpufreq_post_change provides the results of the change (success or failure). cpufreq_levels_changed gives the unit number of the cpufreq device whose number of available levels has changed. Hook in all the drivers I could find that needed it. * TSC: update TSC frequency value. When the available levels change, take the highest possible level and notify the timecounter set_cputicker() of that freq. This gets rid of the "calcru: runtime went backwards" messages. * identcpu: updates the sysctl hw.clockrate value * Profiling: if profiling is active when the clock changes, let the user know the results may be inaccurate. Reviewed by: bde, phk MFC after: 1 month
Revision 1.152: download - view: text, markup, annotated - select for diffs
Tue Mar 20 20:22:45 2007 UTC (4 years, 10 months ago) by jkim
Branches: MAIN
Diff to: previous 1.151: preferred, colored
Changes since revision 1.151: +2 -2 lines
- Add macros for newly added CPUID bits in the corresponding header files. - Use correct capticalization in xTPR as Intel uses in their documents. - Use proper description instead of vendor code name in comment.
Revision 1.151: download - view: text, markup, annotated - select for diffs
Tue Mar 20 18:48:04 2007 UTC (4 years, 10 months ago) by jhb
Branches: MAIN
Diff to: previous 1.150: preferred, colored
Changes since revision 1.150: +2 -2 lines
MFi386 1.173: Display two new Intel feature bits.
Revision 1.150: download - view: text, markup, annotated - select for diffs
Mon Mar 12 20:27:21 2007 UTC (4 years, 11 months ago) by jkim
Branches: MAIN
Diff to: previous 1.149: preferred, colored
Changes since revision 1.149: +1 -1 lines
Add another CPUID for AMD CPUs and fix style(9) while I am here.
Revision 1.149: download - view: text, markup, annotated - select for diffs
Tue Jan 9 19:23:21 2007 UTC (5 years, 1 month ago) by jkim
Branches: MAIN
Diff to: previous 1.148: preferred, colored
Changes since revision 1.148: +2 -2 lines
Add SSSE3 extensions and correct CNXT-ID spelling for Intel processors.
Revision 1.136.2.4: download - view: text, markup, annotated - select for diffs
Wed Dec 6 20:12:13 2006 UTC (5 years, 2 months ago) by sobomax
Branches: RELENG_6
Diff to: previous 1.136.2.3: preferred, colored; branchpoint 1.136: preferred, colored
Changes since revision 1.136.2.3: +8 -7 lines
MFC all relevant changes since beginning of 2006: - Correct spelling of 3DNow!; - Add two new CPUID bits for AMD CPUs, i. e., SVM and extended APIC register; - Add another Intel CPU feature flag, xTPR (Send Task Priority Messages); - Remove bogus white-space diff to current.
Revision 1.148: download - view: text, markup, annotated - select for diffs
Tue Aug 1 01:23:39 2006 UTC (5 years, 6 months ago) by obrien
Branches: MAIN
Diff to: previous 1.147: preferred, colored
Changes since revision 1.147: +2 -2 lines
Correct spelling of 3DNow!.
Revision 1.147: download - view: text, markup, annotated - select for diffs
Wed Jul 12 06:04:11 2006 UTC (5 years, 7 months ago) by jkim
Branches: MAIN
Diff to: previous 1.146: preferred, colored
Changes since revision 1.146: +2 -2 lines
Add two new CPUID bits for AMD CPUs, i. e., SVM and extended APIC register.
Revision 1.146: download - view: text, markup, annotated - select for diffs
Mon Apr 24 22:56:57 2006 UTC (5 years, 9 months ago) by jkim
Branches: MAIN
Diff to: previous 1.145: preferred, colored
Changes since revision 1.145: +1 -1 lines
Add another Intel CPU feature flag, xTPR (Send Task Priority Messages).
Revision 1.145: download - view: text, markup, annotated - select for diffs
Mon Apr 24 22:23:52 2006 UTC (5 years, 9 months ago) by jkim
Branches: MAIN
Diff to: previous 1.144: preferred, colored
Changes since revision 1.144: +2 -1 lines
Check if deterministic cache parameters leaf is valid before use.
Revision 1.136.2.2.2.1: download - view: text, markup, annotated - select for diffs
Mon Apr 24 18:24:30 2006 UTC (5 years, 9 months ago) by jkim
Branches: RELENG_6_1
CVS tags: RELENG_6_1_0_RELEASE
Diff to: previous 1.136.2.2: preferred, colored; next MAIN 1.136.2.3: preferred, colored
Changes since revision 1.136.2.2: +75 -9 lines
MFC: Multicore detection. - Print number of physical/logical cores and more CPUID info. - Add newer CPUID definitions for future use. - Correct few MSR addresses while I am here. - Fix spelling mistake. Approved by: re (hrs)
Revision 1.136.2.3: download - view: text, markup, annotated - select for diffs
Mon Apr 24 18:21:54 2006 UTC (5 years, 9 months ago) by jkim
Branches: RELENG_6
CVS tags: RELENG_6_2_BP, RELENG_6_2_0_RELEASE, RELENG_6_2
Diff to: previous 1.136.2.2: preferred, colored; branchpoint 1.136: preferred, colored
Changes since revision 1.136.2.2: +75 -9 lines
MFC: Multicore detection. - Print number of physical/logical cores and more CPUID info. - Add newer CPUID definitions for future use. - Correct few MSR addresses while I am here. - Fix spelling mistake. Approved by: re (hrs)
Revision 1.136.2.2: download - view: text, markup, annotated - select for diffs
Thu Feb 23 15:03:42 2006 UTC (5 years, 11 months ago) by dwmalone
Branches: RELENG_6
CVS tags: RELENG_6_1_BP
Branch point for: RELENG_6_1
Diff to: previous 1.136.2.1: preferred, colored; branchpoint 1.136: preferred, colored
Changes since revision 1.136.2.1: +2 -2 lines
MFC: Print Virtual Machine Extensions feature and remove stale comment. Approved by: re (scottl)
Revision 1.144: download - view: text, markup, annotated - select for diffs
Wed Feb 15 14:48:59 2006 UTC (5 years, 11 months ago) by dwmalone
Branches: MAIN
Diff to: previous 1.143: preferred, colored
Changes since revision 1.143: +2 -2 lines
It seems bit 5 of cpu_feature2 is the VMX (Virtual Machine Extensions) bit. While I'm here, delete a comment that was cut and past from the cpu_features code that doesn't belong here.
Revision 1.143: download - view: text, markup, annotated - select for diffs
Sun Jan 1 05:35:57 2006 UTC (6 years, 1 month ago) by netchild
Branches: MAIN
Diff to: previous 1.142: preferred, colored
Changes since revision 1.142: +3 -3 lines
Unbreak kernel build. A happy new year to all. Submitted by: Goran Gajic <ggajic@afrodita.rcub.bg.ac.yu>, bz Pointy hat to: netchild Appologies to: all
Revision 1.142: download - view: text, markup, annotated - select for diffs
Sat Dec 31 14:39:18 2005 UTC (6 years, 1 month ago) by netchild
Branches: MAIN
Diff to: previous 1.141: preferred, colored
Changes since revision 1.141: +32 -0 lines
MI changes: - provide an interface (macros) to the page coloring part of the VM system, this allows to try different coloring algorithms without the need to touch every file [1] - make the page queue tuning values readable: sysctl vm.stats.pagequeue - autotuning of the page coloring values based upon the cache size instead of options in the kernel config (disabling of the page coloring as a kernel option is still possible) MD changes: - detection of the cache size: only IA32 and AMD64 (untested) contains cache size detection code, every other arch just comes with a dummy function (this results in the use of default values like it was the case without the autotuning of the page coloring) - print some more info on Intel CPU's (like we do on AMD and Transmeta CPU's) Note to AMD owners (IA32 and AMD64): please run "sysctl vm.stats.pagequeue" and report if the cache* values are zero (= bug in the cache detection code) or not. Based upon work by: Chad David <davidc@acns.ab.ca> [1] Reviewed by: alc, arch (in 2004) Discussed with: alc, Chad David, arch (in 2004)
Revision 1.141: download - view: text, markup, annotated - select for diffs
Thu Nov 17 02:32:39 2005 UTC (6 years, 2 months ago) by obrien
Branches: MAIN
Diff to: previous 1.140: preferred, colored
Changes since revision 1.140: +1 -1 lines
Fix spelling mistake. Submitted by: kris
Revision 1.136.2.1: download - view: text, markup, annotated - select for diffs
Mon Nov 7 08:41:11 2005 UTC (6 years, 3 months ago) by obrien
Branches: RELENG_6
Diff to: previous 1.136: preferred, colored
Changes since revision 1.136: +9 -0 lines
MFC: for AMD dual-core processors, nullify CPUID.HTT.
Revision 1.140: download - view: text, markup, annotated - select for diffs
Mon Oct 17 23:23:20 2005 UTC (6 years, 3 months ago) by jkim
Branches: MAIN
Diff to: previous 1.139: preferred, colored
Changes since revision 1.139: +4 -3 lines
Redo physical/logical CPU count. Suggested by: jhb
Revision 1.139: download - view: text, markup, annotated - select for diffs
Mon Oct 17 15:51:27 2005 UTC (6 years, 3 months ago) by jkim
Branches: MAIN
Diff to: previous 1.138: preferred, colored
Changes since revision 1.138: +3 -2 lines
Split displaying number of physical and logical cores.
Revision 1.138: download - view: text, markup, annotated - select for diffs
Sun Oct 16 08:58:27 2005 UTC (6 years, 3 months ago) by obrien
Branches: MAIN
Diff to: previous 1.137: preferred, colored
Changes since revision 1.137: +9 -0 lines
For AMD processors, nullify CPUID.HTT. FreeBSD has no need for the information it conveys, and it is only confusing people. This fixes incorrect output in the previous commit.
Revision 1.137: download - view: text, markup, annotated - select for diffs
Fri Oct 14 22:52:00 2005 UTC (6 years, 3 months ago) by jkim
Branches: MAIN
Diff to: previous 1.136: preferred, colored
Changes since revision 1.136: +72 -8 lines
- Print number of physical/logical cores and more CPUID info. - Add newer CPUID definitions for future use. Many thanks to Mike Tancsa <mike at sentex dot net> for providing test cases for Intel Pentium D and AMD Athlon 64 X2. Approved by: anholt (mentor)
Revision 1.134.2.2: download - view: text, markup, annotated - select for diffs
Sun Jun 5 08:44:08 2005 UTC (6 years, 8 months ago) by schweikh
Branches: RELENG_5
CVS tags: RELENG_5_5_BP, RELENG_5_5_0_RELEASE, RELENG_5_5
Diff to: previous 1.134.2.1: preferred, colored; branchpoint 1.134: preferred, colored; next MAIN 1.135: preferred, colored
Changes since revision 1.134.2.1: +1 -1 lines
MFC: Chop a '>' in a feature name (RSVD2>) that snuck in; this now balances the <> flags displayed at boot, e.g. without this Features2=0x41d<SSE3,RSVD2>,MON,DS_CPL,CNTX-ID>
Revision 1.136: download - view: text, markup, annotated - select for diffs
Sun May 29 17:43:23 2005 UTC (6 years, 8 months ago) by schweikh
Branches: MAIN
CVS tags: RELENG_6_BP, RELENG_6_0_BP, RELENG_6_0_0_RELEASE, RELENG_6_0
Branch point for: RELENG_6
Diff to: previous 1.135: preferred, colored
Changes since revision 1.135: +1 -1 lines
Chop a '>' in a feature name (RSVD2>) that snuck in; this now balances the <> flags displayed at boot, e.g. without this Features2=0x41d<SSE3,RSVD2>,MON,DS_CPL,CNTX-ID> MFC after: 1 week
Revision 1.134.2.1: download - view: text, markup, annotated - select for diffs
Mon Feb 14 10:12:09 2005 UTC (6 years, 11 months ago) by obrien
Branches: RELENG_5
CVS tags: RELENG_5_4_BP, RELENG_5_4_0_RELEASE, RELENG_5_4
Diff to: previous 1.134: preferred, colored
Changes since revision 1.134: +0 -2 lines
MFC: copyright tweaks.
Revision 1.135: download - view: text, markup, annotated - select for diffs
Fri Jan 21 05:56:40 2005 UTC (7 years ago) by peter
Branches: MAIN
Diff to: previous 1.134: preferred, colored
Changes since revision 1.134: +0 -2 lines
MFi386: whitespace, copyright header, etc updates
Revision 1.134: download - view: text, markup, annotated - select for diffs
Tue Jun 8 01:20:37 2004 UTC (7 years, 8 months ago) by peter
Branches: MAIN
CVS tags: RELENG_5_BP, RELENG_5_3_BP, RELENG_5_3_0_RELEASE, RELENG_5_3
Branch point for: RELENG_5
Diff to: previous 1.133: preferred, colored
Changes since revision 1.133: +0 -1 lines
Argh. Remove stray number that slipped into the previous commit.
Revision 1.133: download - view: text, markup, annotated - select for diffs
Tue Jun 8 01:02:51 2004 UTC (7 years, 8 months ago) by peter
Branches: MAIN
Diff to: previous 1.132: preferred, colored
Changes since revision 1.132: +112 -124 lines
Initial PG_NX support (no-execute page bit) - export the rest of the cpu features (and amd's features). - turn on EFER_NXE, depending on the NX amd feature bit - reorg the identcpu stuff a bit in order to stop treating the amd features as second class features (since it is now a primary feature bit set) and make it easier to export.
Revision 1.132: download - view: text, markup, annotated - select for diffs
Thu Jun 3 20:18:15 2004 UTC (7 years, 8 months ago) by peter
Branches: MAIN
Diff to: previous 1.131: preferred, colored
Changes since revision 1.131: +4 -1 lines
MFi386: move cpu_nameclass struct next to its only consumer
Revision 1.131: download - view: text, markup, annotated - select for diffs
Wed Apr 7 00:44:15 2004 UTC (7 years, 10 months ago) by peter
Branches: MAIN
Diff to: previous 1.130: preferred, colored
Changes since revision 1.130: +55 -5 lines
Update to include both the L1 and L2 TLB stats, as well as the seperate 2M/4M page TLB vs 4K page TLB stats. This also applies to the i386 platform, as does the cpu features fixes.
Revision 1.130: download - view: text, markup, annotated - select for diffs
Thu Mar 25 03:38:31 2004 UTC (7 years, 10 months ago) by peter
Branches: MAIN
Diff to: previous 1.129: preferred, colored
Changes since revision 1.129: +43 -5 lines
Run print_AMD_features() for both AuthenticAMD and GenuineIntel cpus. Report the %ecx bits in cpuid function 1. This is a hack. When reporting AMD Features, only mask off the common bits. Otherwise the SEP bit masks off SYSCALL etc in the report.
Revision 1.129: download - view: text, markup, annotated - select for diffs
Sat Mar 6 00:51:30 2004 UTC (7 years, 11 months ago) by peter
Branches: MAIN
Diff to: previous 1.128: preferred, colored
Changes since revision 1.128: +2 -2 lines
When faced with a "GenuineIntel", we know what they call it now. Replace snide comment with a different one.
Revision 1.128: download - view: text, markup, annotated - select for diffs
Fri Nov 21 03:01:59 2003 UTC (8 years, 2 months ago) by peter
Branches: MAIN
CVS tags: RELENG_5_2_BP, RELENG_5_2_1_RELEASE, RELENG_5_2_0_RELEASE, RELENG_5_2
Diff to: previous 1.127: preferred, colored
Changes since revision 1.127: +1 -1 lines
Cosmetic and/or trivial sync up with i386. Approved by: re (rwatson)
Revision 1.127: download - view: text, markup, annotated - select for diffs
Mon Nov 17 08:58:12 2003 UTC (8 years, 2 months ago) by peter
Branches: MAIN
Diff to: previous 1.126: preferred, colored
Changes since revision 1.126: +2 -1 lines
Initial landing of SMP support for FreeBSD/amd64. - This is heavily derived from John Baldwin's apic/pci cleanup on i386. - I have completely rewritten or drastically cleaned up some other parts. (in particular, bootstrap) - This is still a WIP. It seems that there are some highly bogus bioses on nVidia nForce3-150 boards. I can't stress how broken these boards are. I have a workaround in mind, but right now the Asus SK8N is broken. The Gigabyte K8NPro (nVidia based) is also mind-numbingly hosed. - Most of my testing has been with SCHED_ULE. SCHED_4BSD works. - the apic and acpi components are 'standard'. - If you have an nVidia nForce3-150 board, you are stuck with 'device atpic' in addition, because they somehow managed to forget to connect the 8254 timer to the apic, even though its in the same silicon! ARGH! This directly violates the ACPI spec.
Revision 1.126: download - view: text, markup, annotated - select for diffs
Fri Jul 25 21:15:44 2003 UTC (8 years, 6 months ago) by obrien
Branches: MAIN
Diff to: previous 1.125: preferred, colored
Changes since revision 1.125: +3 -1 lines
Use __FBSDID(). Brought to you by: a boring talk at Ottawa Linux Symposium
Revision 1.125: download - view: text, markup, annotated - select for diffs
Tue May 27 21:59:56 2003 UTC (8 years, 8 months ago) by peter
Branches: MAIN
CVS tags: RELENG_5_1_BP, RELENG_5_1_0_RELEASE, RELENG_5_1
Diff to: previous 1.124: preferred, colored
Changes since revision 1.124: +5 -5 lines
Update AMD Features vector to include NX (page table entry no-execute bit) and LM (long mode) etc.
Revision 1.124: download - view: text, markup, annotated - select for diffs
Sun May 11 23:01:04 2003 UTC (8 years, 9 months ago) by peter
Branches: MAIN
Diff to: previous 1.123: preferred, colored
Changes since revision 1.123: +2 -2 lines
Call it an AMD64 Processor, not a Hammer. Also, it seems that the cpuid model numbers are wider than I first thought. Approved by: re (blanket amd64/*)
Revision 1.123: download - view: text, markup, annotated - select for diffs
Thu May 1 01:05:21 2003 UTC (8 years, 9 months ago) by peter
Branches: MAIN
Diff to: previous 1.122: preferred, colored
Changes since revision 1.122: +38 -1042 lines
Commit MD parts of a loosely functional AMD64 port. This is based on a heavily stripped down FreeBSD/i386 (brutally stripped down actually) to attempt to get a stable base to start from. There is a lot missing still. Worth noting: - The kernel runs at 1GB in order to cheat with the pmap code. pmap uses a variation of the PAE code in order to avoid having to worry about 4 levels of page tables yet. - It boots in 64 bit "long mode" with a tiny trampoline embedded in the i386 loader. This simplifies locore.s greatly. - There are still quite a few fragments of i386-specific code that have not been translated yet, and some that I cheated and wrote dumb C versions of (bcopy etc). - It has both int 0x80 for syscalls (but using registers for argument passing, as is native on the amd64 ABI), and the 'syscall' instruction for syscalls. int 0x80 preserves all registers, 'syscall' does not. - I have tried to minimize looking at the NetBSD code, except in a couple of places (eg: to find which register they use to replace the trashed %rcx register in the syscall instruction). As a result, there is not a lot of similarity. I did look at NetBSD a few times while debugging to get some ideas about what I might have done wrong in my first attempt.
Revision 1.122: download - view: text, markup, annotated - select for diffs
Wed Apr 30 12:23:58 2003 UTC (8 years, 9 months ago) by markm
Branches: MAIN
Diff to: previous 1.121: preferred, colored
Changes since revision 1.121: +8 -1 lines
Warns fixing. Protect against inappropriate linting, and mark GCC-specific assemble code as such (in #ifdefs). Fix an easy static variable warning while I'm here.
Revision 1.80.2.14.2.1: download - view: text, markup, annotated - select for diffs
Mon Apr 14 14:36:19 2003 UTC (8 years, 9 months ago) by jhb
Branches: old_RELENG_4_8
Diff to: previous 1.80.2.14: preferred, colored; next MAIN 1.80.2.15: preferred, colored
Changes since revision 1.80.2.14: +1 -1 lines
MFS: Fix booting on 80386 machines. CD vendor's may want to re-roll their own release to include this fix. Approved by: re (murray)
Revision 1.80.2.15: download - view: text, markup, annotated - select for diffs
Fri Apr 11 17:06:41 2003 UTC (8 years, 10 months ago) by jhb
Branches: old_RELENG_4
Diff to: previous 1.80.2.14: preferred, colored; branchpoint 1.80: preferred, colored; next MAIN 1.81: preferred, colored
Changes since revision 1.80.2.14: +1 -1 lines
Revert one part of the last change so that cpu_class has a default value again. Apparently some code in pmap reads the value of this variable before it is properly initialized. That is a bug (!) but not a critical one and it is easier to make this change than hunt down that bug. This fixes booting on 80386 machines. Submitted by: Erik Trulsson <ertr1013@student.uu.se> Pointy hat to: jhb
Revision 1.121: download - view: text, markup, annotated - select for diffs
Thu Apr 10 07:05:24 2003 UTC (8 years, 10 months ago) by wes
Branches: MAIN
Diff to: previous 1.120: preferred, colored
Changes since revision 1.120: +6 -0 lines
Add a sysctl that records and reports the CPU clock rate calculated at boot. Funny how often this trivial piece of information crops up in embedded boxen. Sponsored by: St. Bernard Software
Revision 1.120: download - view: text, markup, annotated - select for diffs
Fri Apr 4 17:29:54 2003 UTC (8 years, 10 months ago) by des
Branches: MAIN
Diff to: previous 1.119: preferred, colored
Changes since revision 1.119: +1 -1 lines
Define ovbcopy() as a macro which expands to the equivalent bcopy() call, to take care of the KAME IPv6 code which needs ovbcopy() because NetBSD's bcopy() doesn't handle overlap like ours. Remove all implementations of ovbcopy(). Previously, bzero was a function pointer on i386, to save a jmp to bzero_vector. Get rid of this microoptimization as it only confuses things, adds machine-dependent code to an MD header, and doesn't really save all that much. This commit does not add my pagezero() / pagecopy() code.
Revision 1.119: download - view: text, markup, annotated - select for diffs
Tue Mar 18 08:45:22 2003 UTC (8 years, 10 months ago) by phk
Branches: MAIN
Diff to: previous 1.118: preferred, colored
Changes since revision 1.118: +0 -1 lines
Including <sys/stdint.h> is (almost?) universally only to be able to use %j in printfs, so put a newsted include in <sys/systm.h> where the printf prototype lives and save everybody else the trouble.
Revision 1.118: download - view: text, markup, annotated - select for diffs
Thu Feb 27 20:38:48 2003 UTC (8 years, 11 months ago) by jhb
Branches: MAIN
Diff to: previous 1.117: preferred, colored
Changes since revision 1.117: +3 -1 lines
Expand some #ifdef's to fix I386_CPU compile. Reported by: Andy Farkas <andyf@speednet.com.au>
Revision 1.117: download - view: text, markup, annotated - select for diffs
Wed Jan 29 11:36:39 2003 UTC (9 years ago) by phk
Branches: MAIN
Diff to: previous 1.116: preferred, colored
Changes since revision 1.116: +7 -6 lines
Make tsc_freq a 64bit quantity. Inspired by: http://www.theinquirer.net/?article=7481
Revision 1.80.2.14: download - view: text, markup, annotated - select for diffs
Wed Jan 22 20:14:52 2003 UTC (9 years ago) by jhb
Branches: old_RELENG_4
CVS tags: old_RELENG_4_8_BP, old_RELENG_4_8_0_RELEASE
Branch point for: old_RELENG_4_8
Diff to: previous 1.80.2.13: preferred, colored; branchpoint 1.80: preferred, colored
Changes since revision 1.80.2.13: +106 -66 lines
MFC: Precursors to simple hyperthreading support and sync with current: - Axe earlysetcpuclass() as it was OBE a long time ago. - Add cpu_exthigh to hold the highest supported extended cpuid. - Don't initialize cpu_class, the initial value isn't used anywhere. - Make the support for processor names in the extended cpuid information shared between the AMD and Transmeta sections and also perform it for Intel CPUs. - Support brand-indexed names for Intel CPUs. - Sync AMD 486 cpu_model's with current. - Remove duplicate and bogus docs for bits 28 and 29 of cpuid features. - Document bits 30 and 31 of cpuid features. - Display the number of logical cores on CPUs that support hyperthreading. - Make hw_instruction_sse static. - Move enable_sse()'s prototype to machine/md_var.h. - Add cpu_procinfo to hold information about this processor from cpuid 1 including count of HTT cores, brand index, local APIC ID, etc.
Revision 1.116: download - view: text, markup, annotated - select for diffs
Wed Jan 22 17:54:12 2003 UTC (9 years ago) by jhb
Branches: MAIN
Diff to: previous 1.115: preferred, colored
Changes since revision 1.115: +3 -3 lines
Rename cpuid_cpuinfo to cpu_procinfo. bde requested that I rename this variable to something in the cpu_* namespace since that's what all the other cpuid variables were named and cpu_procinfo is what I came up with. Requested by: bde
Revision 1.115: download - view: text, markup, annotated - select for diffs
Thu Jan 9 19:59:28 2003 UTC (9 years, 1 month ago) by jhb
Branches: MAIN
Diff to: previous 1.114: preferred, colored
Changes since revision 1.114: +0 -15 lines
Remove earlysetcpuclass() as it has been OBE. Suggested by: bde
Revision 1.114: download - view: text, markup, annotated - select for diffs
Thu Jan 9 19:54:49 2003 UTC (9 years, 1 month ago) by jhb
Branches: MAIN
Diff to: previous 1.113: preferred, colored
Changes since revision 1.113: +28 -2 lines
Rework part of the previous processor name changes so that we read cpu_exthigh and cpu_brand in printcpuinfo() instead of in identify_cpu(). We also only do it for known-good values of cpu_vendor which is a bit more conservative. Reviewed by: bde (mostly)
Revision 1.113: download - view: text, markup, annotated - select for diffs
Wed Jan 8 19:16:11 2003 UTC (9 years, 1 month ago) by jhb
Branches: MAIN
Diff to: previous 1.112: preferred, colored
Changes since revision 1.112: +3 -3 lines
Consistently use spaces in between arguments to strcmp(). Whitespace only.
Revision 1.112: download - view: text, markup, annotated - select for diffs
Wed Jan 8 16:41:48 2003 UTC (9 years, 1 month ago) by jhb
Branches: MAIN
Diff to: previous 1.111: preferred, colored
Changes since revision 1.111: +51 -36 lines
- Use cpu_exthigh instead of executing cpuid again to retrieve it for the print_AMD_foo() functions. - Add a brand name table for the brand index provided on Intel CPU's in %ebx after cpuid 1. - For Intel CPUs, if we don't get a processor name from the extended cpuid then use the brand index in cpuid_cpuinfo to pick a name from the brand table and copy that name into cpu_brand. - Replace the duplicated code to use the extended cpuid to replace cpu_model with the processor name in the AMD and Transmeta sections of printcpuinfo() with generic code that replaces cpu_model with cpu_brand if cpu_brand is not an empty string. We also trim leading spaces from cpu_brand prior to doing this since at least some processor names (notably those of Intel CPUs) have leading spaces in the name. - Give print_AMD_features() its own private regs[] array since printcpuinfo() doesn't use the one it has anymore.
Revision 1.111: download - view: text, markup, annotated - select for diffs
Wed Jan 8 16:33:03 2003 UTC (9 years, 1 month ago) by jhb
Branches: MAIN
Diff to: previous 1.110: preferred, colored
Changes since revision 1.110: +1 -1 lines
Bah, get the test for more than one logical CPU right so we don't bogusly claim a CPU has HT support when it lists 0 or 1 logical CPU's per physical processor.
Revision 1.110: download - view: text, markup, annotated - select for diffs
Wed Jan 8 01:23:16 2003 UTC (9 years, 1 month ago) by jhb
Branches: MAIN
Diff to: previous 1.109: preferred, colored
Changes since revision 1.109: +9 -0 lines
If the boot processor supports hyperthreading and contains more than one logical CPU, display the number of logical CPUs per physical processor underneath the list of CPU features.
Revision 1.109: download - view: text, markup, annotated - select for diffs
Fri Jan 3 18:54:59 2003 UTC (9 years, 1 month ago) by jhb
Branches: MAIN
Diff to: previous 1.108: preferred, colored
Changes since revision 1.108: +1 -1 lines
Document bit 31 of the cpuid features word as PBE (Pending Break Enable).
Revision 1.80.2.13: download - view: text, markup, annotated - select for diffs
Mon Dec 23 18:32:05 2002 UTC (9 years, 1 month ago) by trhodes
Branches: old_RELENG_4
Diff to: previous 1.80.2.12: preferred, colored; branchpoint 1.80: preferred, colored
Changes since revision 1.80.2.12: +1 -1 lines
Spell 'monintor' as 'monitor' Pointed out by: ceri
Revision 1.80.2.12: download - view: text, markup, annotated - select for diffs
Mon Dec 23 18:10:54 2002 UTC (9 years, 1 month ago) by trhodes
Branches: old_RELENG_4
Diff to: previous 1.80.2.11: preferred, colored; branchpoint 1.80: preferred, colored
Changes since revision 1.80.2.11: +5 -3 lines
MFC: revisions 1.96 && 1.97 Requested by: Peter Johnson <freebsd@bilogic.org>
Revision 1.108: download - view: text, markup, annotated - select for diffs
Wed Sep 4 19:43:21 2002 UTC (9 years, 5 months ago) by phk
Branches: MAIN
CVS tags: old_RELENG_5_0_BP, old_RELENG_5_0_0_RELEASE, old_RELENG_5_0
Diff to: previous 1.107: preferred, colored
Changes since revision 1.107: +0 -44 lines
Change the support for AMDs ElanSC520 CPU from being a device driver to be options CPU_ELAN (NB: Soekris.com users!) It is cleaner this way. We still recognize the cpu on the host-pci bridge.
Revision 1.107: download - view: text, markup, annotated - select for diffs
Wed Aug 14 18:07:09 2002 UTC (9 years, 5 months ago) by jmallett
Branches: MAIN
Diff to: previous 1.106: preferred, colored
Changes since revision 1.106: +1 -1 lines
Document why the has_f00f_bug variable is initialised rather than placed into the BSS (so that it can be binary-patched). Inspired by: bde
Revision 1.106: download - view: text, markup, annotated - select for diffs
Wed Jul 31 13:45:42 2002 UTC (9 years, 6 months ago) by phk
Branches: MAIN
Diff to: previous 1.105: preferred, colored
Changes since revision 1.105: +1 -1 lines
The Elan SC520 MMCR is actually 16bit wide, so u_char is inconvenient.
Revision 1.105: download - view: text, markup, annotated - select for diffs
Thu Jul 18 12:56:48 2002 UTC (9 years, 6 months ago) by phk
Branches: MAIN
Diff to: previous 1.104: preferred, colored
Changes since revision 1.104: +49 -4 lines
Add initialization code for the AMD Elan sc520 which maps the MMCR into KVM and sets the i8254 frequency to the correct value.
Revision 1.80.2.11: download - view: text, markup, annotated - select for diffs
Sun Apr 28 22:50:51 2002 UTC (9 years, 9 months ago) by dwmalone
Branches: old_RELENG_4
CVS tags: old_RELENG_4_7_BP, old_RELENG_4_7_0_RELEASE, old_RELENG_4_7, old_RELENG_4_6_BP, old_RELENG_4_6_2_RELEASE, old_RELENG_4_6_1_RELEASE, old_RELENG_4_6_0_RELEASE, old_RELENG_4_6
Diff to: previous 1.80.2.10: preferred, colored; branchpoint 1.80: preferred, colored
Changes since revision 1.80.2.10: +0 -11 lines
MFC (identcpu.c 1.101, cpufunc.h 1.108 and 1.120): Move do_cpuid() from a identcpu.c into cpufunc.h and make style match surounding code. Gcc constraints still need to be fixed.
Revision 1.104: download - view: text, markup, annotated - select for diffs
Sat Apr 27 18:13:35 2002 UTC (9 years, 9 months ago) by alc
Branches: MAIN
Diff to: previous 1.103: preferred, colored
Changes since revision 1.103: +8 -1 lines
For what it's worth, fix the compilation of an I386_CPU-only kernel now that certain warnings are fatal.
Revision 1.80.2.10: download - view: text, markup, annotated - select for diffs
Mon Mar 25 12:51:31 2002 UTC (9 years, 10 months ago) by nyan
Branches: old_RELENG_4
Diff to: previous 1.80.2.9: preferred, colored; branchpoint 1.80: preferred, colored
Changes since revision 1.80.2.9: +28 -24 lines
MFC: revision 1.100 (Cosmetic changes).
Revision 1.103: download - view: text, markup, annotated - select for diffs
Mon Mar 4 18:45:56 2002 UTC (9 years, 11 months ago) by iwasaki
Branches: MAIN
Diff to: previous 1.102: preferred, colored
Changes since revision 1.102: +70 -0 lines
Add generalized power profile code. This makes other power-management system (APM for now) to be able to generate power profile change events (ie. AC-line status changes), and other kernel components, not only the ACPI components, can be notified the events. - move subroutines in acpi_powerprofile.c (removed) to kern/subr_power.c - call power_profile_set_state() also from APM driver when AC-line status changes - add call-back function for Crusoe LongRun controlling on power profile changes for a example
Revision 1.80.2.9: download - view: text, markup, annotated - select for diffs
Wed Feb 20 14:19:28 2002 UTC (9 years, 11 months ago) by cjc
Branches: old_RELENG_4
Diff to: previous 1.80.2.8: preferred, colored; branchpoint 1.80: preferred, colored
Changes since revision 1.80.2.8: +1 -1 lines
Fix typo in comment. PR: i386/35114 Submitted by: Gavin Atkinson <gavin.atkinson@ury.york.ac.uk>
Revision 1.102: download - view: text, markup, annotated - select for diffs
Wed Feb 20 14:15:58 2002 UTC (9 years, 11 months ago) by cjc
Branches: MAIN
Diff to: previous 1.101: preferred, colored
Changes since revision 1.101: +2 -2 lines
Fix typos in some comments. PR: i386/35114 Submitted by: Gavin Atkinson <gavin.atkinson@ury.york.ac.uk>
Revision 1.101: download - view: text, markup, annotated - select for diffs
Tue Feb 12 21:06:43 2002 UTC (9 years, 11 months ago) by dwmalone
Branches: MAIN
Diff to: previous 1.100: preferred, colored
Changes since revision 1.100: +0 -11 lines
Move do_cpuid() from a identcpu.c into cpufunc.h.
Revision 1.80.2.8: download - view: text, markup, annotated - select for diffs
Tue Feb 12 03:17:12 2002 UTC (9 years, 11 months ago) by kato
Branches: old_RELENG_4
Diff to: previous 1.80.2.7: preferred, colored; branchpoint 1.80: preferred, colored
Changes since revision 1.80.2.7: +6 -4 lines
MFC: revision 1.99 (recognize VIA C3 Samuel 2).
Revision 1.100: download - view: text, markup, annotated - select for diffs
Sun Feb 10 11:23:14 2002 UTC (10 years ago) by kato
Branches: MAIN
Diff to: previous 1.99: preferred, colored
Changes since revision 1.99: +28 -24 lines
Cosmetic changes: - Collected i486 identification codes in one place like 586 and 686. - Merged two cases (0x470 and 0x490) for `Enhanced Am486DX4 Write-Back.' - Replaced `unknown' into `Unknown'. Submitted by: chi@bd.mbn.or.jp (Chiharu Shibata)
Revision 1.99: download - view: text, markup, annotated - select for diffs
Sat Feb 9 05:18:01 2002 UTC (10 years ago) by kato
Branches: MAIN
Diff to: previous 1.98: preferred, colored
Changes since revision 1.98: +6 -4 lines
Recognize VIA C3 Samuel 2. MFC after: 3 days
Revision 1.98: download - view: text, markup, annotated - select for diffs
Tue Jan 22 01:28:32 2002 UTC (10 years ago) by peter
Branches: MAIN
Diff to: previous 1.97: preferred, colored
Changes since revision 1.97: +2 -2 lines
List bit 18 (reserved, apparently present on thunderbird cpus) and bit 19 (athlon XP/MP rev 0x662 and later) for amd_features. Submitted by: dwcjr
Revision 1.97: download - view: text, markup, annotated - select for diffs
Wed Jan 16 02:22:19 2002 UTC (10 years ago) by peter
Branches: MAIN
Diff to: previous 1.96: preferred, colored
Changes since revision 1.96: +3 -3 lines
Change <b28> to HTT (Hyperthreading technology). If this flag is set then cpuid with %eax=1 will return a logical cpu count in bits 16-23 of %ebx. Bit 29 is actually 'TM' according to AP-485. This signifies the presence of the thermal control circuit (which I believe can slow the clock down to reduce core temperature).
Revision 1.96: download - view: text, markup, annotated - select for diffs
Fri Nov 30 11:57:23 2001 UTC (10 years, 2 months ago) by peter
Branches: MAIN
Diff to: previous 1.95: preferred, colored
Changes since revision 1.95: +1 -1 lines
cpuid bit 30 is 'IA64', for when you're running in i386 mode on an ia64 cpu. (This is for either userland apps running in i386 mode on an ia64 OS, or when the cpu is in i386 legacy mode running an i386 OS).
Revision 1.80.2.7: download - view: text, markup, annotated - select for diffs
Thu Oct 18 04:05:14 2001 UTC (10 years, 3 months ago) by jdp
Branches: old_RELENG_4
CVS tags: old_RELENG_4_5_BP, old_RELENG_4_5_0_RELEASE, old_RELENG_4_5
Diff to: previous 1.80.2.6: preferred, colored; branchpoint 1.80: preferred, colored
Changes since revision 1.80.2.6: +4 -9 lines
MFC 1.94 -> 1.95: Fix the cpuid asm statement so it works at -O2. Also, replace the .byte directive with the "cpuid" mnemonic, since the assembler supports it now.
Revision 1.95: download - view: text, markup, annotated - select for diffs
Fri Oct 12 16:49:28 2001 UTC (10 years, 4 months ago) by jdp
Branches: MAIN
Diff to: previous 1.94: preferred, colored
Changes since revision 1.94: +4 -9 lines
Correct the input/output/clobber specifications for the cpuid instruction. Stefan Keller <dres@earth.serd.org> noticed that CPU identification was broken when compiled with -O2, and tracked it down to the asm statement, which was storing values into memory without specifying that memory was modified. He submitted a patch which added "memory" as a clobber, but I refined it further to arrive at this version. MFC after: 3 days
Revision 1.94: download - view: text, markup, annotated - select for diffs
Mon Sep 10 04:22:20 2001 UTC (10 years, 5 months ago) by peter
Branches: MAIN
CVS tags: old_KSE_PRE_MILESTONE_2, old_KSE_MILESTONE_2
Diff to: previous 1.93: preferred, colored
Changes since revision 1.93: +20 -20 lines
gcc-3 has objections about the bluetrap6 and bluetrap13 inline asm functions. Apparently multi-line string asm arguments are deprecated.
Revision 1.80.2.6: download - view: text, markup, annotated - select for diffs
Thu Jul 19 09:12:07 2001 UTC (10 years, 6 months ago) by kato
Branches: old_RELENG_4
CVS tags: old_RELENG_4_4_BP, old_RELENG_4_4_0_RELEASE, old_RELENG_4_4
Diff to: previous 1.80.2.5: preferred, colored; branchpoint 1.80: preferred, colored
Changes since revision 1.80.2.5: +2 -1 lines
MFC: Recoginize Tualatin core (1.92.)
Revision 1.80.2.5: download - view: text, markup, annotated - select for diffs
Wed Jul 11 14:22:13 2001 UTC (10 years, 7 months ago) by iwasaki
Branches: old_RELENG_4
Diff to: previous 1.80.2.4: preferred, colored; branchpoint 1.80: preferred, colored
Changes since revision 1.80.2.4: +254 -2 lines
MFC: Add code to detect Transmeta Crusoe cpus (1.90->1.91) and
LongRun support (1.92->1.93).
Okayed by: dfr
Revision 1.93: download - view: text, markup, annotated - select for diffs
Tue Jul 3 10:03:24 2001 UTC (10 years, 7 months ago) by iwasaki
Branches: MAIN
Diff to: previous 1.92: preferred, colored
Changes since revision 1.92: +199 -1 lines
Add Transmeta Crusoe LongRun support. Submitted by: Tamotsu HATTORI <athlete@kta.att.ne.jp> Reviewed by: arch@ folks MFC after: 1 week
Revision 1.92: download - view: text, markup, annotated - select for diffs
Tue Jun 26 03:02:30 2001 UTC (10 years, 7 months ago) by kato
Branches: MAIN
Diff to: previous 1.91: preferred, colored
Changes since revision 1.91: +2 -1 lines
Recognize FC-PGA2 Pentium III (Tualatin).
Revision 1.91: download - view: text, markup, annotated - select for diffs
Mon Jun 25 15:11:33 2001 UTC (10 years, 7 months ago) by dfr
Branches: MAIN
Diff to: previous 1.90: preferred, colored
Changes since revision 1.90: +56 -3 lines
Add code to detect Transmeta Crusoe cpus.
Revision 1.90: download - view: text, markup, annotated - select for diffs
Tue Jan 16 09:10:32 2001 UTC (11 years ago) by peter
Branches: MAIN
Diff to: previous 1.89: preferred, colored
Changes since revision 1.89: +7 -4 lines
Stop doing runtime checking on i386 cpus for cpu class. The cpu is
slow enough as it is, without having to constantly check that it really
is an i386 still. It was possible to compile out the conditionals for
faster cpus by leaving out 'I386_CPU', but it was not possible to
unconditionally compile for the i386. You got the runtime checking whether
you wanted it or not. This makes I386_CPU mutually exclusive with the
other cpu types, and tidies things up a little in the process.
Reviewed by: alfred, markm, phk, benno, jlemon, jhb, jake, grog, msmith,
jasone, dcs, des (and a bunch more people who encouraged it)
Revision 1.89: download - view: text, markup, annotated - select for diffs
Tue Nov 21 20:16:47 2000 UTC (11 years, 2 months ago) by markm
Branches: MAIN
Diff to: previous 1.88: preferred, colored
Changes since revision 1.88: +2 -2 lines
Assembler fixes. Fix opcodes that were typed as ".byte 0xNN, 0xMM" when an older assembler could not recognise the newer Pentium instructions. Reviewed by: jhb
Revision 1.88: download - view: text, markup, annotated - select for diffs
Sun Oct 29 13:56:41 2000 UTC (11 years, 3 months ago) by phk
Branches: MAIN
Diff to: previous 1.87: preferred, colored
Changes since revision 1.87: +1 -2 lines
Remove unneeded #include <sys/proc.h> lines.
Revision 1.57.2.16: download - view: text, markup, annotated - select for diffs
Mon Oct 2 13:49:25 2000 UTC (11 years, 4 months ago) by asmodai
Branches: old_RELENG_3
Diff to: previous 1.57.2.15: preferred, colored; branchpoint 1.57: preferred, colored; next MAIN 1.58: preferred, colored
Changes since revision 1.57.2.15: +20 -13 lines
MFC: - Pentium 4 recognition code - Descriptions of some features
Revision 1.80.2.4: download - view: text, markup, annotated - select for diffs
Sat Sep 30 03:32:21 2000 UTC (11 years, 4 months ago) by ps
Branches: old_RELENG_4
CVS tags: old_RELENG_4_3_BP, old_RELENG_4_3_0_RELEASE, old_RELENG_4_3, old_RELENG_4_2_0_RELEASE
Diff to: previous 1.80.2.3: preferred, colored; branchpoint 1.80: preferred, colored
Changes since revision 1.80.2.3: +16 -11 lines
MFC: Pentium4 support.
Revision 1.87: download - view: text, markup, annotated - select for diffs
Fri Sep 29 04:53:00 2000 UTC (11 years, 4 months ago) by peter
Branches: MAIN
Diff to: previous 1.86: preferred, colored
Changes since revision 1.86: +11 -11 lines
Fill in some more missing bits from cpu_features according to the Intel Pentium4 cpuid docs.
Revision 1.86: download - view: text, markup, annotated - select for diffs
Fri Sep 29 04:38:35 2000 UTC (11 years, 4 months ago) by peter
Branches: MAIN
Diff to: previous 1.85: preferred, colored
Changes since revision 1.85: +6 -1 lines
First shot at identifying the Pentum 4 acording to our reading of the the cpu_id extensions in the Intel docs. There is more info available. See the following URL for more details. http://developer.intel.com/design/processor/future/manuals/CPUID_Supplement.htm Requested by: Intel
Revision 1.85: download - view: text, markup, annotated - select for diffs
Wed Sep 27 11:33:31 2000 UTC (11 years, 4 months ago) by asmodai
Branches: MAIN
Diff to: previous 1.84: preferred, colored
Changes since revision 1.84: +2 -2 lines
Fix spelling of Katmai [Katami].
Revision 1.80.2.3: download - view: text, markup, annotated - select for diffs
Wed Sep 27 11:32:54 2000 UTC (11 years, 4 months ago) by asmodai
Branches: old_RELENG_4
Diff to: previous 1.80.2.2: preferred, colored; branchpoint 1.80: preferred, colored
Changes since revision 1.80.2.2: +25 -21 lines
MFC: Add some features which will now be recognised. Add documentation comments. Fix Katmai spelling.
Revision 1.57.2.15: download - view: text, markup, annotated - select for diffs
Wed Sep 27 11:20:02 2000 UTC (11 years, 4 months ago) by asmodai
Branches: old_RELENG_3
Diff to: previous 1.57.2.14: preferred, colored; branchpoint 1.57: preferred, colored
Changes since revision 1.57.2.14: +46 -42 lines
MFC: Add a ton of features which will now be recognised. Add documentation comments. Add sysctl descriptions.
Revision 1.57.2.14: download - view: text, markup, annotated - select for diffs
Tue Sep 26 15:06:08 2000 UTC (11 years, 4 months ago) by asmodai
Branches: old_RELENG_3
Diff to: previous 1.57.2.13: preferred, colored; branchpoint 1.57: preferred, colored
Changes since revision 1.57.2.13: +2 -1 lines
MFC: Recognize new Pentium III Xeon (stepping A0).
Revision 1.80.2.2: download - view: text, markup, annotated - select for diffs
Tue Sep 26 09:02:23 2000 UTC (11 years, 4 months ago) by kato
Branches: old_RELENG_4
Diff to: previous 1.80.2.1: preferred, colored; branchpoint 1.80: preferred, colored
Changes since revision 1.80.2.1: +2 -1 lines
MFC: Recognize new Pentium III Xeon (stepping A0).
Revision 1.84: download - view: text, markup, annotated - select for diffs
Tue Sep 26 08:59:55 2000 UTC (11 years, 4 months ago) by kato
Branches: MAIN
Diff to: previous 1.83: preferred, colored
Changes since revision 1.83: +2 -1 lines
Recognize new Pentium III Xeon (stepping A0). PR: 21233 Submitted by: ade
Revision 1.83: download - view: text, markup, annotated - select for diffs
Thu Sep 7 01:32:43 2000 UTC (11 years, 5 months ago) by jasone
Branches: MAIN
Diff to: previous 1.82: preferred, colored
Changes since revision 1.82: +4 -1 lines
Major update to the way synchronization is done in the kernel. Highlights include: * Mutual exclusion is used instead of spl*(). See mutex(9). (Note: The alpha port is still in transition and currently uses both.) * Per-CPU idle processes. * Interrupts are run in their own separate kernel threads and can be preempted (i386 only). Partially contributed by: BSDi (BSD/OS) Submissions by (at least): cp, dfr, dillon, grog, jake, jhb, sheldonh
Revision 1.57.2.13: download - view: text, markup, annotated - select for diffs
Wed Jun 14 13:02:54 2000 UTC (11 years, 7 months ago) by kato
Branches: old_RELENG_3
CVS tags: old_RELENG_3_5_0_RELEASE
Diff to: previous 1.57.2.12: preferred, colored; branchpoint 1.57: preferred, colored
Changes since revision 1.57.2.12: +2 -2 lines
MFC: Celeron recognition (rev. 1.82).
Revision 1.80.2.1: download - view: text, markup, annotated - select for diffs
Wed Jun 14 13:00:25 2000 UTC (11 years, 7 months ago) by kato
Branches: old_RELENG_4
CVS tags: old_RELENG_4_1_1_RELEASE, old_RELENG_4_1_0_RELEASE
Diff to: previous 1.80: preferred, colored
Changes since revision 1.80: +2 -2 lines
MFC: Celeron recognition (rev. 1.82).
Revision 1.82: download - view: text, markup, annotated - select for diffs
Tue Jun 13 12:33:45 2000 UTC (11 years, 7 months ago) by kato
Branches: MAIN
CVS tags: old_PRE_SMPNG
Diff to: previous 1.81: preferred, colored
Changes since revision 1.81: +2 -2 lines
Recognize Coppermine Celeron processors whose CPU ID = 0x68?. They were recognized as "Pentium III/Pentium III Xeon."
Revision 1.81: download - view: text, markup, annotated - select for diffs
Wed May 3 18:07:30 2000 UTC (11 years, 9 months ago) by dwhite
Branches: MAIN
Diff to: previous 1.80: preferred, colored
Changes since revision 1.80: +24 -20 lines
I mentioned yesterday that I could use some work, and Kelly says, "Commit my PRs!" So here I go. Add definitions for some of the AMD CPU feature bits. Also add a comment on where to find the rest of them. This is a purely cosmetic change. PR: i386/14438 Submitted by: Kelly Yancey <kbyanc@egroups.net>
Revision 1.57.2.12: download - view: text, markup, annotated - select for diffs
Wed Mar 22 11:21:16 2000 UTC (11 years, 10 months ago) by patrick
Branches: old_RELENG_3
Diff to: previous 1.57.2.11: preferred, colored; branchpoint 1.57: preferred, colored
Changes since revision 1.57.2.11: +1 -5 lines
MFC: Display CPU (BSP) clock speed on SMP systems. (-CURRENT diff 1.76) Reviewed by: green Tested by: Brandon D. Valentine <bandix@looksharp.net> Tod Luginbuhl <tod@science-guy.npt.nuwc.navy.mil>
Revision 1.57.2.11: download - view: text, markup, annotated - select for diffs
Wed Mar 22 05:27:22 2000 UTC (11 years, 10 months ago) by nyan
Branches: old_RELENG_3
Diff to: previous 1.57.2.10: preferred, colored; branchpoint 1.57: preferred, colored
Changes since revision 1.57.2.10: +5 -12 lines
MFC: Simplify messages of Pentium II, Pentium II Xeon, Celeron, Pentium III
and Pentium III Xeon CPUs.
Revision 1.57.2.10: download - view: text, markup, annotated - select for diffs
Wed Feb 2 03:50:19 2000 UTC (12 years ago) by bde
Branches: old_RELENG_3
Diff to: previous 1.57.2.9: preferred, colored; branchpoint 1.57: preferred, colored
Changes since revision 1.57.2.9: +3 -1 lines
MFC: fixes for profiling of elf kernels. See the commit logs on 1999/05/10 for identcpu.c and on 1999/05/6 for everything else. Unlike in -current, no additional fixes are needed for high resolution profiling.
Revision 1.80: download - view: text, markup, annotated - select for diffs
Sat Jan 29 07:49:02 2000 UTC (12 years ago) by kato
Branches: MAIN
CVS tags: old_RELENG_4_BP, old_RELENG_4_0_0_RELEASE
Branch point for: old_RELENG_4
Diff to: previous 1.79: preferred, colored
Changes since revision 1.79: +5 -12 lines
Simplify messages of Pentium II, Pentium II Xeon, Celeron, Pentium III and Pentium III Xeon CPUs. If a CPU is one of Pentium II, Pentium II Xeon and Celeron, the message is always "Pentium II/Pentium II Xeon/Celeron". If a CPU is one of Pentium III and Pentium III Xeon, the message is always "Pentium III/Pentium III Xeon".
Revision 1.57.2.9: download - view: text, markup, annotated - select for diffs
Sat Jan 15 06:29:41 2000 UTC (12 years ago) by tanimura
Branches: old_RELENG_3
Diff to: previous 1.57.2.8: preferred, colored; branchpoint 1.57: preferred, colored
Changes since revision 1.57.2.8: +5 -1 lines
MFC: Add P-III(Coppermine).
Revision 1.79: download - view: text, markup, annotated - select for diffs
Sat Jan 15 06:29:03 2000 UTC (12 years ago) by tanimura
Branches: MAIN
Diff to: previous 1.78: preferred, colored
Changes since revision 1.78: +5 -1 lines
A processor with the CPUID of 0x?8? is Pentium III. (aka Coppermine) Noticed by: Satoshi Sawada <k-sawata@gnoc2.comminet.or.jp> Reviewd by: Takuma Yamada <fuzzy2@st.rim.or.jp>
Revision 1.78: download - view: text, markup, annotated - select for diffs
Sun Oct 24 23:36:20 1999 UTC (12 years, 3 months ago) by alc
Branches: MAIN
Diff to: previous 1.77: preferred, colored
Changes since revision 1.77: +3 -3 lines
Add text for the Athlon's MMX and 3DNow! (DSP) instruction extensions to print_AMD_features.
Revision 1.77: download - view: text, markup, annotated - select for diffs
Thu Oct 14 13:59:52 1999 UTC (12 years, 3 months ago) by kato
Branches: MAIN
Diff to: previous 1.76: preferred, colored
Changes since revision 1.76: +3 -3 lines
Recognize Pentium II w/ CPUID = 0x6XX and Pentium III Xeon w/ CPUID = 0x7XX. Pointed out by: Brian Somers <brian@Awfulhak.org>
Revision 1.76: download - view: text, markup, annotated - select for diffs
Wed Sep 22 21:21:53 1999 UTC (12 years, 4 months ago) by luoqi
Branches: MAIN
Diff to: previous 1.75: preferred, colored
Changes since revision 1.75: +1 -5 lines
Display CPU (BSP) clock speed on SMP systems.
Revision 1.57.2.8: download - view: text, markup, annotated - select for diffs
Fri Sep 10 20:47:22 1999 UTC (12 years, 5 months ago) by phk
Branches: old_RELENG_3
CVS tags: old_RELENG_3_4_0_RELEASE, old_RELENG_3_3_0_RELEASE
Diff to: previous 1.57.2.7: preferred, colored; branchpoint 1.57: preferred, colored
Changes since revision 1.57.2.7: +2 -1 lines
MFC: tsc is not suitable for timecounting on WinChip C6 Submitted by: IMAI Takeshi <take-i@ceres.dti.ne.jp> Reviewed by: phk Approved by: jkh
Revision 1.75: download - view: text, markup, annotated - select for diffs
Fri Sep 10 20:45:50 1999 UTC (12 years, 5 months ago) by phk
Branches: MAIN
Diff to: previous 1.74: preferred, colored
Changes since revision 1.74: +2 -1 lines
System clock don't update, because C6's TSC stop count up when run HALT instruction. PR: 13683 Submitted by: IMAI Takeshi <take-i@ceres.dti.ne.jp> Reviewed by: phk
Revision 1.74: download - view: text, markup, annotated - select for diffs
Fri Sep 10 15:47:54 1999 UTC (12 years, 5 months ago) by peter
Branches: MAIN
Diff to: previous 1.73: preferred, colored
Changes since revision 1.73: +18 -18 lines
Add text for the PN (Processor serial number) and XMM (extended SIMD/MMX2/ support), as well as a bunch of comments for what the various bits mean (those that I remember anyway).
Revision 1.7.2.19: download - view: text, markup, annotated - select for diffs
Sun Sep 5 08:11:07 1999 UTC (12 years, 5 months ago) by peter
Branches: old_RELENG_2_2
Diff to: previous 1.7.2.18: preferred, colored; branchpoint 1.7: preferred, colored; next MAIN 1.8: preferred, colored
Changes since revision 1.7.2.18: +1 -1 lines
$Id$ -> $FreeBSD$
Revision 1.57.2.7: download - view: text, markup, annotated - select for diffs
Sun Aug 29 16:05:41 1999 UTC (12 years, 5 months ago) by peter
Branches: old_RELENG_3
Diff to: previous 1.57.2.6: preferred, colored; branchpoint 1.57: preferred, colored
Changes since revision 1.57.2.6: +1 -1 lines
$Id$ -> $FreeBSD$
Revision 1.73: download - view: text, markup, annotated - select for diffs
Sat Aug 28 00:43:44 1999 UTC (12 years, 5 months ago) by peter
Branches: MAIN
Diff to: previous 1.72: preferred, colored
Changes since revision 1.72: +1 -1 lines
$Id$ -> $FreeBSD$
Revision 1.57.2.6: download - view: text, markup, annotated - select for diffs
Fri Aug 27 08:09:04 1999 UTC (12 years, 5 months ago) by kato
Branches: old_RELENG_3
Diff to: previous 1.57.2.5: preferred, colored; branchpoint 1.57: preferred, colored
Changes since revision 1.57.2.5: +15 -1 lines
MFC: IBM BlueLightning CPU detection (revision 1.72).
Revision 1.72: download - view: text, markup, annotated - select for diffs
Fri Aug 20 09:31:18 1999 UTC (12 years, 5 months ago) by kato
Branches: MAIN
Diff to: previous 1.71: preferred, colored
Changes since revision 1.71: +15 -1 lines
There may exist two kinds of IBM BlueLightning CPU. One is that 5/2 test does not change undefined flag like Cyrix CPUs. Another is that 5/2 test changes undefined flag like Intel CPUs. Latter one could not be detected and was recognized 486DX CPU. To solve this, finishidentcpu() calls identblue() when cpu_vendor is null string (that is, CPUID instruction is not supported) and cpu == CPU_486. Tests have been done on IBM BlueLightning CPUs, i486SX and i486DX.
Revision 1.57.2.5: download - view: text, markup, annotated - select for diffs
Tue Jul 6 17:21:48 1999 UTC (12 years, 7 months ago) by green
Branches: old_RELENG_3
Diff to: previous 1.57.2.4: preferred, colored; branchpoint 1.57: preferred, colored
Changes since revision 1.57.2.4: +2 -2 lines
0ff0 -> 0xff0. Sorry about that. Noticed by: cracauer Pointy hat to: green
Revision 1.71: download - view: text, markup, annotated - select for diffs
Tue Jul 6 13:23:56 1999 UTC (12 years, 7 months ago) by peter
Branches: MAIN
Diff to: previous 1.70: preferred, colored
Changes since revision 1.70: +2 -2 lines
Quieten gcc paranoia.
Revision 1.70: download - view: text, markup, annotated - select for diffs
Tue Jul 6 12:42:26 1999 UTC (12 years, 7 months ago) by peter
Branches: MAIN
Diff to: previous 1.69: preferred, colored
Changes since revision 1.69: +2 -2 lines
Typo: s/0ff0/0xff0/
Revision 1.57.2.4: download - view: text, markup, annotated - select for diffs
Tue Jul 6 06:49:47 1999 UTC (12 years, 7 months ago) by green
Branches: old_RELENG_3
Diff to: previous 1.57.2.3: preferred, colored; branchpoint 1.57: preferred, colored
Changes since revision 1.57.2.3: +81 -12 lines
MFC some i386-family-CPU changes.
Revision 1.69: download - view: text, markup, annotated - select for diffs
Tue Jul 6 06:25:38 1999 UTC (12 years, 7 months ago) by green
Branches: MAIN
Diff to: previous 1.68: preferred, colored
Changes since revision 1.68: +14 -1 lines
Add Centaur/IDT WinChip support. Why in the world do people put breaks at the end of a switch's default case?
Revision 1.68: download - view: text, markup, annotated - select for diffs
Tue Jul 6 05:25:41 1999 UTC (12 years, 7 months ago) by green
Branches: MAIN
Diff to: previous 1.67: preferred, colored
Changes since revision 1.67: +52 -47 lines
I made some cleanups, rearranged things a bit, and made AMD Features default printing on CPUs that have it. If there are no objections, I'll MFC all recent changes (harmless, really) to 3.2 and PAO.
Revision 1.67: download - view: text, markup, annotated - select for diffs
Mon Jul 5 02:28:21 1999 UTC (12 years, 7 months ago) by green
Branches: MAIN
Diff to: previous 1.66: preferred, colored
Changes since revision 1.66: +2 -2 lines
Add an extra space to " AMD Features=" to make it line up well.
Revision 1.66: download - view: text, markup, annotated - select for diffs
Mon Jul 5 02:27:32 1999 UTC (12 years, 7 months ago) by green
Branches: MAIN
Diff to: previous 1.65: preferred, colored
Changes since revision 1.65: +54 -4 lines
K6-III CPUs are now case:d in the appropriate switch; also, in print_AMD_info(), L2 internal cache is shown, as are AMD's special CPUID infos: CPU: AMD-K6(tm) 3D processor (350.81-MHz 586-class CPU) Origin = "AuthenticAMD" Id = 0x58c Stepping=12 Features=0x8021bf<FPU,VME,DE,PSE,TSC,MSR,MCE,CX8,PGE,MMX> AMD Features=0x808029bf<FPU,VME,DE,PSE,TSC,MSR,MCE,CX8,SYSCALL,PGE,MMX,3DNow!> PR: kern/12512 Submitted by: Louis A. Mamakos <louie@TransSys.COM>
Revision 1.57.2.3: download - view: text, markup, annotated - select for diffs
Fri Jun 25 03:05:48 1999 UTC (12 years, 7 months ago) by green
Branches: old_RELENG_3
Diff to: previous 1.57.2.2: preferred, colored; branchpoint 1.57: preferred, colored
Changes since revision 1.57.2.2: +12 -2 lines
MFC: Rise mP6 support requires an addition to identcpu.c, and a workaround
to the read-only (write -> GPF) TSC. We no longer zero the TSC at
boot.
Reviewed by: msmith
Revision 1.57.2.2: download - view: text, markup, annotated - select for diffs
Thu Jun 24 20:16:34 1999 UTC (12 years, 7 months ago) by jlemon
Branches: old_RELENG_3
Diff to: previous 1.57.2.1: preferred, colored; branchpoint 1.57: preferred, colored
Changes since revision 1.57.2.1: +2 -2 lines
MFC: rev 1.65, cyrix WT_ALLOC fix.
Revision 1.65: download - view: text, markup, annotated - select for diffs
Thu Jun 24 20:08:56 1999 UTC (12 years, 7 months ago) by jlemon
Branches: MAIN
Diff to: previous 1.64: preferred, colored
Changes since revision 1.64: +2 -2 lines
Only include AMD wt_alloc routines if I586_CPU is defined. Fixes CPU_WT_ALLOC for cyrix chips. Submitted by: "Brian Smith" <dbsoft@technologist.com>
Revision 1.64: download - view: text, markup, annotated - select for diffs
Thu Jun 24 03:47:54 1999 UTC (12 years, 7 months ago) by green
Branches: MAIN
Diff to: previous 1.63: preferred, colored
Changes since revision 1.63: +12 -2 lines
This commit gives support for the Rise mP6 CPU. It has two changes: 1. Rise is recognized in identdcpu.c. 2. The TSC is not written to. A workaround for the CPU bug is being applied to clock.c (the bug being that the mP6 has TSC enabled in its CPUID-capabilities, but it only supports reading it. If we try to write to it (MSR 16), a GPF occurs.) The new behavior is that FreeBSD will _not_ zero the TSC. Instead, we do a bit of 64-bit arithmetic. Reviewed by: msmith Obtained from: unfurl & msmith
Revision 1.63: download - view: text, markup, annotated - select for diffs
Sat May 29 06:57:38 1999 UTC (12 years, 8 months ago) by phk
Branches: MAIN
Diff to: previous 1.62: preferred, colored
Changes since revision 1.62: +2 -1 lines
Stop the TSC from being used as timecounter on K5/step0 machines.
Revision 1.62: download - view: text, markup, annotated - select for diffs
Mon May 10 10:51:25 1999 UTC (12 years, 9 months ago) by bde
Branches: MAIN
Diff to: previous 1.61: preferred, colored
Changes since revision 1.61: +3 -1 lines
[Forgot to commit this in the batch a few days ago.] Fixed profiling of elf kernels. Made high resolution profiling compile for elf kernels (it is broken for all kernels due to lack of egcs support). Renaming of many assembler labels is avoided by declaring by declaring the labels that need to be visible to gprof as having type "function" and depending on the elf version of gprof being zealous about discarding the others. A few type declarations are still missing, mainly for SMP. PR: 9413 Submitted by: Assar Westerlund <assar@sics.se> (initial parts)
Revision 1.61: download - view: text, markup, annotated - select for diffs
Mon May 3 23:57:13 1999 UTC (12 years, 9 months ago) by billf
Branches: MAIN
Diff to: previous 1.60: preferred, colored
Changes since revision 1.60: +5 -3 lines
Add sysctl descriptions to many SYSCTL_XXXs PR: kern/11197 Submitted by: Adrian Chadd <adrian@FreeBSD.org> Reviewed by: billf(spelling/style/minor nits) Looked at by: bde(style)
Revision 1.60: download - view: text, markup, annotated - select for diffs
Wed Mar 10 20:42:00 1999 UTC (12 years, 11 months ago) by roberto
Branches: MAIN
CVS tags: old_PRE_VFS_BIO_NFS_PATCH, old_PRE_SMP_VMSHARE, old_PRE_NEWBUS, old_POST_VFS_BIO_NFS_PATCH, old_POST_SMP_VMSHARE, old_POST_NEWBUS
Diff to: previous 1.59: preferred, colored
Changes since revision 1.59: +3 -3 lines
Fix two tests against hex. values for CPUID. PR: i386/10050 Submitted by: Kevin Day <toasty@dragondata.com>
Revision 1.59: download - view: text, markup, annotated - select for diffs
Sat Feb 20 19:46:39 1999 UTC (12 years, 11 months ago) by roberto
Branches: MAIN
Diff to: previous 1.58: preferred, colored
Changes since revision 1.58: +2 -2 lines
Bit 24 of the Feature Flag is FXSR (for Fast FP Save and Restore). Reminded by: Francis Dupont <Francis.Dupont@inria.fr>
Revision 1.57.2.1: download - view: text, markup, annotated - select for diffs
Sat Feb 6 16:20:17 1999 UTC (13 years ago) by kato
Branches: old_RELENG_3
CVS tags: old_RELENG_3_2_PAO_BP, old_RELENG_3_2_PAO, old_RELENG_3_2_0_RELEASE, old_RELENG_3_1_0_RELEASE
Diff to: previous 1.57: preferred, colored
Changes since revision 1.57: +11 -2 lines
MFC: Pentium II Xeon, Celeron and Pentium III recognition. OKed by: jkh
Revision 1.58: download - view: text, markup, annotated - select for diffs
Thu Feb 4 16:48:25 1999 UTC (13 years ago) by kato
Branches: MAIN
Diff to: previous 1.57: preferred, colored
Changes since revision 1.57: +11 -2 lines
Recognize Pentium II Xeon, Celeron and Pentium III cpus. Because CPU names are printed on their packages and shown by BIOS, kernel does not need to show details. PR: 8751, 9320 and 9463
Revision 1.57: download - view: text, markup, annotated - select for diffs
Sat Jan 16 13:41:33 1999 UTC (13 years ago) by kato
Branches: MAIN
CVS tags: old_RELENG_3_BP
Branch point for: old_RELENG_3
Diff to: previous 1.56: preferred, colored
Changes since revision 1.56: +20 -17 lines
There are two models of AMD K6-2 Model 8 (c.f. AMD's document), so the CPU stepping must be checked. Also, fixed print_AMD_info. Submitted by: Akio Morita <amorita@meadow.scphys.kyoto-u.ac.jp>
Revision 1.56: download - view: text, markup, annotated - select for diffs
Sat Jan 9 13:07:18 1999 UTC (13 years, 1 month ago) by bde
Branches: MAIN
Diff to: previous 1.55: preferred, colored
Changes since revision 1.55: +8 -8 lines
Don't put operands in clobber lists, since this is dubious for old versions of gcc and broken for current versions of egcs. Cleaned up the asm statement for do_cpuid() a little. Submitted by: "John S. Dyson" <dyson@iquest.net> but rewritten by me
Revision 1.55: download - view: text, markup, annotated - select for diffs
Fri Jan 8 16:29:56 1999 UTC (13 years, 1 month ago) by bde
Branches: MAIN
Diff to: previous 1.54: preferred, colored
Changes since revision 1.54: +4 -5 lines
Moved declarations related to copying and zeroing to the right place.
Revision 1.54: download - view: text, markup, annotated - select for diffs
Sun Dec 27 23:23:26 1998 UTC (13 years, 1 month ago) by msmith
Branches: MAIN
Diff to: previous 1.53: preferred, colored
Changes since revision 1.53: +19 -6 lines
From the submitter: CPU_WT_ALLOC does not work correctly for K6-2s of model 8+ and probably K6-3s (when they appear on the market soon). In addition, print_AMD_info() incorrectly printfs write allocation's size. I've fixed them, so they now Do The Right Thing, and added a "NO_MEMORY_HOLE" option to easily allow 15-16mb range handling for us K6 and K6-2 users. Submitted by: Brian Feldman <green@unixhelp.org>
Revision 1.53: download - view: text, markup, annotated - select for diffs
Sat Dec 5 16:30:55 1998 UTC (13 years, 2 months ago) by kato
Branches: MAIN
Diff to: previous 1.52: preferred, colored
Changes since revision 1.52: +20 -1 lines
Print out information for write-allocate of AMD CPUs. Submitted by: Akio Morita <amorita@meadow.scphys.kyoto-u.ac.jp>
Revision 1.52: download - view: text, markup, annotated - select for diffs
Tue Oct 6 13:16:23 1998 UTC (13 years, 4 months ago) by kato
Branches: MAIN
CVS tags: old_RELENG_3_0_0_RELEASE
Diff to: previous 1.51: preferred, colored
Changes since revision 1.51: +25 -5 lines
- Implement enabling write allocate on AMD K5/K6/K6-2 cpus. The code was originaly contributed by Kelly Yancey <kbyanc@freedomnet.com> in PR i386/6269 and revised by Akio Morita <amorita@meadow.scphys.kyoto-u.ac.jp> and me. Test was performed by Akio Morita and Toshiomi Moriki <moriki@db.is.kyushu-u.ac.jp>. - Fix stylistic bug in identcpu.c. - Update copyright in initcpu.c - Fix typo in LINT. PR: 6269 and 6270
Revision 1.51: download - view: text, markup, annotated - select for diffs
Sat Jul 11 07:45:28 1998 UTC (13 years, 7 months ago) by bde
Branches: MAIN
Diff to: previous 1.50: preferred, colored
Changes since revision 1.50: +7 -7 lines
Fixed printf format errors.
Revision 1.50: download - view: text, markup, annotated - select for diffs
Sat Jul 11 05:59:34 1998 UTC (13 years, 7 months ago) by bde
Branches: MAIN
Diff to: previous 1.49: preferred, colored
Changes since revision 1.49: +8 -8 lines
Don't pretend to support ix86's with 16-bit ints by using longs just to ensure 32-bit variables. Doing so mainly bogotified some printf formats. Fixed disorder in md_var.h.
Revision 1.7.2.18: download - view: text, markup, annotated - select for diffs
Tue Jul 7 05:22:46 1998 UTC (13 years, 7 months ago) by gibbs
Branches: old_RELENG_2_2
CVS tags: old_RELENG_2_2_8_RELEASE, old_RELENG_2_2_7_RELEASE
Diff to: previous 1.7.2.17: preferred, colored; branchpoint 1.7: preferred, colored
Changes since revision 1.7.2.17: +3 -3 lines
asm->__asm inline->__inline
Revision 1.49: download - view: text, markup, annotated - select for diffs
Tue Jun 30 19:41:21 1998 UTC (13 years, 7 months ago) by phk
Branches: MAIN
CVS tags: old_PRE_NOBDEV
Diff to: previous 1.48: preferred, colored
Changes since revision 1.48: +2 -2 lines
Add PSE36 to the bits we know by name.
Revision 1.7.2.17: download - view: text, markup, annotated - select for diffs
Fri May 22 22:18:42 1998 UTC (13 years, 8 months ago) by des
Branches: old_RELENG_2_2
Diff to: previous 1.7.2.16: preferred, colored; branchpoint 1.7: preferred, colored
Changes since revision 1.7.2.16: +50 -3 lines
MFC: precise identification of models within the 586 and 686 families.
Revision 1.48: download - view: text, markup, annotated - select for diffs
Fri May 22 22:15:14 1998 UTC (13 years, 8 months ago) by des
Branches: MAIN
Diff to: previous 1.47: preferred, colored
Changes since revision 1.47: +41 -8 lines
Use switch instead of if/else chain for 686 model identification. Add precise model identification for 586-family CPUs.
Revision 1.47: download - view: text, markup, annotated - select for diffs
Thu May 21 22:53:24 1998 UTC (13 years, 8 months ago) by des
Branches: MAIN
Diff to: previous 1.46: preferred, colored
Changes since revision 1.46: +16 -2 lines
Correctly identify the precise CPU model within the 686 family: instead of just printing "Pentium Pro", check the model (cpu_id & 0xf0) and print the appropriate information.
Revision 1.46: download - view: text, markup, annotated - select for diffs
Tue May 19 19:40:45 1998 UTC (13 years, 8 months ago) by peter
Branches: MAIN
Diff to: previous 1.45: preferred, colored
Changes since revision 1.45: +9 -4 lines
Missing parens caused cpu features not to be printed for cyrix >= M2/MX. Althought the comments say the datasheet doesn't list the device ID registers on the M2/MX, they seem to be there and quite alive. (It's interesting to note that the M2/MX calls itself a 686 class cpu but is missing a heck of a lot of features, including VME, PGE, PSE, etc)
Revision 1.45: download - view: text, markup, annotated - select for diffs
Sun Apr 26 03:18:38 1998 UTC (13 years, 9 months ago) by dyson
Branches: MAIN
Diff to: previous 1.44: preferred, colored
Changes since revision 1.44: +2 -2 lines
Add the PAT cpuid feature.
Revision 1.44: download - view: text, markup, annotated - select for diffs
Wed Apr 15 17:44:58 1998 UTC (13 years, 9 months ago) by bde
Branches: MAIN
CVS tags: old_PRE_DEVFS_SLICE, old_POST_DEVFS_SLICE
Diff to: previous 1.43: preferred, colored
Changes since revision 1.43: +3 -3 lines
Support compiling with `gcc -ansi'.
Revision 1.7.2.16: download - view: text, markup, annotated - select for diffs
Sat Feb 14 13:44:42 1998 UTC (13 years, 11 months ago) by kato
Branches: old_RELENG_2_2
CVS tags: old_RELENG_2_2_6_RELEASE
Diff to: previous 1.7.2.15: preferred, colored; branchpoint 1.7: preferred, colored
Changes since revision 1.7.2.15: +16 -16 lines
MFC: revision 1.43 (use rdmsr instead of wrmsr).
Revision 1.43: download - view: text, markup, annotated - select for diffs
Fri Feb 13 09:34:42 1998 UTC (13 years, 11 months ago) by kato
Branches: MAIN
CVS tags: old_PRE_SOFTUPDATE, old_POST_SOFTUPDATE
Diff to: previous 1.42: preferred, colored
Changes since revision 1.42: +16 -16 lines
Use RDMSR instruction instead of WRMSR.
Revision 1.7.2.15: download - view: text, markup, annotated - select for diffs
Wed Feb 4 14:35:55 1998 UTC (14 years ago) by kato
Branches: old_RELENG_2_2
Diff to: previous 1.7.2.14: preferred, colored; branchpoint 1.7: preferred, colored
Changes since revision 1.7.2.14: +13 -4 lines
MFC: revision 1.42 (cpuid probelm of M2 CPU).
Revision 1.42: download - view: text, markup, annotated - select for diffs
Tue Jan 27 08:12:09 1998 UTC (14 years ago) by kato
Branches: MAIN
Diff to: previous 1.41: preferred, colored
Changes since revision 1.41: +13 -4 lines
Execute cpuid if BIOS disables cpuid instruction of Cyrix 6x86MX CPU.
Revision 1.41: download - view: text, markup, annotated - select for diffs
Sun Jan 25 23:45:33 1998 UTC (14 years ago) by kato
Branches: MAIN
Diff to: previous 1.40: preferred, colored
Changes since revision 1.40: +4 -13 lines
Undo previous commit. The cpuid symbol has been already used by SMP stuff. Pointed-out by: Manfred Antar <root@mantar.slip.netcom.com>
Revision 1.40: download - view: text, markup, annotated - select for diffs
Sun Jan 25 17:01:31 1998 UTC (14 years ago) by kato
Branches: MAIN
Diff to: previous 1.39: preferred, colored
Changes since revision 1.39: +13 -4 lines
Execute cpuid if BIOS disables cpuid instruction of Cyrix 6x86MX CPU, and store its result into cpu_id and cpu_feature variables. Tested by: Simon Coggins <chaos@ultra.net.au>
Revision 1.7.2.14: download - view: text, markup, annotated - select for diffs
Sun Jan 25 15:40:28 1998 UTC (14 years ago) by kato
Branches: old_RELENG_2_2
Diff to: previous 1.7.2.13: preferred, colored; branchpoint 1.7: preferred, colored
Changes since revision 1.7.2.13: +54 -16 lines
MFC: fix general protection fault by wrmsr.
Revision 1.39: download - view: text, markup, annotated - select for diffs
Sun Jan 25 12:01:10 1998 UTC (14 years ago) by kato
Branches: MAIN
Diff to: previous 1.38: preferred, colored
Changes since revision 1.38: +54 -16 lines
Even though BIOS writer's guide recommends cpuid instruction of Cyrix 6x86MX CPU is enabled (BIOS should not disable it), some BIOS disables it via CCR4. In this case, cpu variable becomes CPU_486 and identblue() is called. Because Cyrix 6x86MX has MSR and doesn't have MSR1002, wrmsr instruction generates general protection fault. Tested by: Simon Coggins <chaos@ultra.net.au>
Revision 1.7.2.13: download - view: text, markup, annotated - select for diffs
Sat Jan 3 08:51:29 1998 UTC (14 years, 1 month ago) by obrien
Branches: old_RELENG_2_2
Diff to: previous 1.7.2.12: preferred, colored; branchpoint 1.7: preferred, colored
Changes since revision 1.7.2.12: +99 -12 lines
Merge rev 1.36 of identcpu.c from -CURRENT. Modivation is the new AMD info. Also required merging rev 1.16 of asmacros.h and rev 1.15 of cdefs.h.
Revision 1.38: download - view: text, markup, annotated - select for diffs
Sat Jan 3 05:43:37 1998 UTC (14 years, 1 month ago) by obrien
Branches: MAIN
Diff to: previous 1.37: preferred, colored
Changes since revision 1.37: +3 -3 lines
AMD calls the PR166 and PR200, models 2 and 3 respectively.
Revision 1.37: download - view: text, markup, annotated - select for diffs
Sat Jan 3 05:36:40 1998 UTC (14 years, 1 month ago) by obrien
Branches: MAIN
Diff to: previous 1.36: preferred, colored
Changes since revision 1.36: +3 -2 lines
Update AMD URL for CPU recognition docs.
Revision 1.36: download - view: text, markup, annotated - select for diffs
Fri Dec 26 20:41:32 1997 UTC (14 years, 1 month ago) by phk
Branches: MAIN
Diff to: previous 1.35: preferred, colored
Changes since revision 1.35: +5 -5 lines
Rename "i586_ctr" to "tsc" (both upper and lower case instances). Fix a couple of printfs too. Warning: This changes the names of a couple of kernel options!
Revision 1.7.2.12: download - view: text, markup, annotated - select for diffs
Thu Dec 4 14:36:55 1997 UTC (14 years, 2 months ago) by jkh
Branches: old_RELENG_2_2
Diff to: previous 1.7.2.11: preferred, colored; branchpoint 1.7: preferred, colored
Changes since revision 1.7.2.11: +3 -3 lines
MFC: F00F cleanup.
Revision 1.35: download - view: text, markup, annotated - select for diffs
Thu Dec 4 14:35:38 1997 UTC (14 years, 2 months ago) by jkh
Branches: MAIN
Diff to: previous 1.34: preferred, colored
Changes since revision 1.34: +3 -3 lines
After consultation with David, change #ifndef NO_F00F_HACK to #if defined(I586_CPU) && !defined(NO_F00F_HACK)
Revision 1.7.2.11: download - view: text, markup, annotated - select for diffs
Wed Dec 3 02:48:25 1997 UTC (14 years, 2 months ago) by sef
Branches: old_RELENG_2_2
Diff to: previous 1.7.2.10: preferred, colored; branchpoint 1.7: preferred, colored
Changes since revision 1.7.2.10: +13 -1 lines
MFC -- Intel Pentium F00F bug workaround. Note that I forgot the reviewer credit in the current log message; also credit to Cy Schubert <cschubert@uumail.gov.bc.ca> for cleaning up my initial patches. Reviewed by: Stephen McKay <syssgm@dtir.gld.gov.au>
Revision 1.34: download - view: text, markup, annotated - select for diffs
Wed Dec 3 02:45:42 1997 UTC (14 years, 2 months ago) by sef
Branches: MAIN
Diff to: previous 1.33: preferred, colored
Changes since revision 1.33: +13 -1 lines
Work around for the Intel Pentium F00F bug; this is Intel's recommended workaround. Note that this currently eats up two pages extra in the system; this could be alleviated by aligning idt correctly, and then only dealing with that (as opposed to the current method of allocated two pages and copying the IDT table to that, and then setting that to be the IDT table).
Revision 1.7.2.10: download - view: text, markup, annotated - select for diffs
Fri Nov 7 12:56:48 1997 UTC (14 years, 3 months ago) by kato
Branches: old_RELENG_2_2
Diff to: previous 1.7.2.9: preferred, colored; branchpoint 1.7: preferred, colored
Changes since revision 1.7.2.9: +27 -6 lines
MFC: revision 1.32 (MediaGX CPU identification).
Revision 1.33: download - view: text, markup, annotated - select for diffs
Fri Nov 7 08:52:27 1997 UTC (14 years, 3 months ago) by phk
Branches: MAIN
Diff to: previous 1.32: preferred, colored
Changes since revision 1.32: +1 -2 lines
Remove a bunch of variables which were unused both in GENERIC and LINT. Found by: -Wunused
Revision 1.32: download - view: text, markup, annotated - select for diffs
Thu Nov 6 03:10:28 1997 UTC (14 years, 3 months ago) by kato
Branches: MAIN
Diff to: previous 1.31: preferred, colored
Changes since revision 1.31: +27 -6 lines
Identify MediaGX CPU correctly. Old MeidaGX CPU and GXm CPU are distinguished. CPU-classes of MeidaGX CPU and GXm CPU are 486-class and 586-class, respectively. PR: 4936
Revision 1.7.2.9: download - view: text, markup, annotated - select for diffs
Wed Nov 5 15:15:00 1997 UTC (14 years, 3 months ago) by kato
Branches: old_RELENG_2_2
Diff to: previous 1.7.2.8: preferred, colored; branchpoint 1.7: preferred, colored
Changes since revision 1.7.2.8: +2 -2 lines
MFC: revision 1.31 (Fix 6x86 recognition).
Revision 1.31: download - view: text, markup, annotated - select for diffs
Wed Nov 5 15:12:44 1997 UTC (14 years, 3 months ago) by kato
Branches: MAIN
Diff to: previous 1.30: preferred, colored
Changes since revision 1.30: +2 -2 lines
Fix rare 6x86 CPU whose DIR0 = 0x20 - 0x28 case.
Revision 1.30: download - view: text, markup, annotated - select for diffs
Tue Oct 28 11:43:43 1997 UTC (14 years, 3 months ago) by bde
Branches: MAIN
Diff to: previous 1.29: preferred, colored
Changes since revision 1.29: +3 -2 lines
Don't include <machine/cputypes.h> or declare cputype/class interfaces in <machine/cpu.h>. Moved the declarations to <machine/cputypes.h>. Fixed style bugs in the moved code. Fixed everything that depended on the nested include. Don't include <machine/cpu.h> (in the changed files) unless something in it is used directly.
Revision 1.7.2.8: download - view: text, markup, annotated - select for diffs
Fri Oct 3 14:29:48 1997 UTC (14 years, 4 months ago) by kato
Branches: old_RELENG_2_2
CVS tags: old_RELENG_2_2_5_RELEASE
Diff to: previous 1.7.2.7: preferred, colored; branchpoint 1.7: preferred, colored
Changes since revision 1.7.2.7: +3 -2 lines
MFC (revision 1.29; M2 DIR). I consider it is obvious bug fix. If bug remains in 2.2.5 RELEASE, wrong version information for M2 CPU (clock, revision and stepping) will be included in bug reports.
Revision 1.29: download - view: text, markup, annotated - select for diffs
Fri Oct 3 14:23:47 1997 UTC (14 years, 4 months ago) by kato
Branches: MAIN
Diff to: previous 1.28: preferred, colored
Changes since revision 1.28: +3 -2 lines
Call identifycyrix() when 6x86MX CPU is found. The identifycyrix() function sets cyrix_did. Old code could not display correct variable. Reviewed by: Hideyuki Suzuki <hideyuki@sat.t.u-tokyo.ac.jp>
Revision 1.28: download - view: text, markup, annotated - select for diffs
Sat Sep 20 13:18:48 1997 UTC (14 years, 4 months ago) by phk
Branches: MAIN
Diff to: previous 1.27: preferred, colored
Changes since revision 1.27: +71 -1 lines
For AMD chips, pick up the long description from the chip if possible. (This is not really a typographical improvement in the case of the K6 it seems, but AMD appearantly want it too look that way). Also if bootverbose, dump some more info about the chip.
Revision 1.7.2.7: download - view: text, markup, annotated - select for diffs
Fri Jul 25 08:34:11 1997 UTC (14 years, 6 months ago) by kato
Branches: old_RELENG_2_2
Diff to: previous 1.7.2.6: preferred, colored; branchpoint 1.7: preferred, colored
Changes since revision 1.7.2.6: +2 -2 lines
MFC (I586 --> I686 for Cyrix 6x86MX CPU).
Revision 1.27: download - view: text, markup, annotated - select for diffs
Thu Jul 24 14:19:23 1997 UTC (14 years, 6 months ago) by kato
Branches: MAIN
Diff to: previous 1.26: preferred, colored
Changes since revision 1.26: +2 -2 lines
Treat 6x86MX CPU as 686-class CPU instead of 586-class CPU.
Revision 1.26: download - view: text, markup, annotated - select for diffs
Sun Jul 20 08:37:18 1997 UTC (14 years, 6 months ago) by bde
Branches: MAIN
Diff to: previous 1.25: preferred, colored
Changes since revision 1.25: +1 -5 lines
Removed unused #includes.
Revision 1.7.2.6: download - view: text, markup, annotated - select for diffs
Tue Jun 24 10:03:11 1997 UTC (14 years, 7 months ago) by kato
Branches: old_RELENG_2_2
Diff to: previous 1.7.2.5: preferred, colored; branchpoint 1.7: preferred, colored
Changes since revision 1.7.2.5: +7 -1 lines
YMAFC (revision 1.25; recognize AMD K5 PR166 and PR200 CPUs).
Revision 1.25: download - view: text, markup, annotated - select for diffs
Tue Jun 24 09:45:35 1997 UTC (14 years, 7 months ago) by kato
Branches: MAIN
CVS tags: old_WOLLMAN_MBUF, old_BP_WOLLMAN_MBUF
Diff to: previous 1.24: preferred, colored
Changes since revision 1.24: +7 -1 lines
Recognize AMD K5 PR166 and PR200 CPUs.
Revision 1.7.2.5: download - view: text, markup, annotated - select for diffs
Fri Jun 20 10:27:33 1997 UTC (14 years, 7 months ago) by kato
Branches: old_RELENG_2_2
Diff to: previous 1.7.2.4: preferred, colored; branchpoint 1.7: preferred, colored
Changes since revision 1.7.2.4: +313 -8 lines
Merge revised CPU identification and initialization routine from current. Now, Cyrix 6x86 chip is recognized as Cyrix 6x86 chip.
Revision 1.24: download - view: text, markup, annotated - select for diffs
Mon Jun 2 18:55:44 1997 UTC (14 years, 8 months ago) by peter
Branches: MAIN
Diff to: previous 1.23: preferred, colored
Changes since revision 1.23: +19 -3 lines
Fill in some gaps in the cpuid features list.. bit 10 is the old bit for MTRR (presumably this changed, an older P5 I have has got it, the newer cpus have the new MTRR bit set) bit 11 is SEP (fast syscalls), bit 23 is MMX Fill in the other reserved ones with a stub so that we can see them if they turn up. Obtained from: Intel AP-485 rev.06
Revision 1.23: download - view: text, markup, annotated - select for diffs
Mon Jun 2 08:19:02 1997 UTC (14 years, 8 months ago) by dfr
Branches: MAIN
Diff to: previous 1.22: preferred, colored
Changes since revision 1.22: +2 -2 lines
Move interrupt handling code from isa.c to a new file. This should make isa.c (slightly) more portable and will make my life developing the really portable version much easier. Reviewed by: peter, fsmp
Revision 1.22: download - view: text, markup, annotated - select for diffs
Sat May 31 08:45:23 1997 UTC (14 years, 8 months ago) by kato
Branches: MAIN
Diff to: previous 1.21: preferred, colored
Changes since revision 1.21: +147 -128 lines
- Use `6x86MX' instead of `M2'. Cyrix officially use `6x86MX' for the CPU code-named `M2'. - Use the result of cpuid instruction instead of DIR to identify 6x86MX cpu. DIR0 and DIR1 are not documented in the data sheet, and cpuid instruction is enabled at reset time. - Add a function, init_6x86MX() to initialize 6x86MX cpu. It supports CPU_SUSP_HLT and CPU_IORT options. It always sets NC1 (640K - 1M is not cached.), and enables L1 cache in write-back mode. - Fix typo in the comment in identblue().
Revision 1.21: download - view: text, markup, annotated - select for diffs
Fri May 23 06:22:47 1997 UTC (14 years, 8 months ago) by charnier
Branches: MAIN
Diff to: previous 1.20: preferred, colored
Changes since revision 1.20: +2 -2 lines
typo (Cyirx -> Cyrix).
Revision 1.7.2.4: download - view: text, markup, annotated - select for diffs
Mon May 19 12:59:51 1997 UTC (14 years, 8 months ago) by kato
Branches: old_RELENG_2_2
Diff to: previous 1.7.2.3: preferred, colored; branchpoint 1.7: preferred, colored
Changes since revision 1.7.2.3: +16 -1 lines
YAMFC (revision 1.20; recognize AMD 486 CPUs).
Revision 1.20: download - view: text, markup, annotated - select for diffs
Mon May 19 12:41:35 1997 UTC (14 years, 8 months ago) by kato
Branches: MAIN
Diff to: previous 1.19: preferred, colored
Changes since revision 1.19: +16 -1 lines
Recognize AMD 486 CPUs.
Revision 1.19: download - view: text, markup, annotated - select for diffs
Mon May 5 14:30:00 1997 UTC (14 years, 9 months ago) by kato
Branches: MAIN
Diff to: previous 1.18: preferred, colored
Changes since revision 1.18: +2 -2 lines
Use `MediaGX' instead of `Gx86'.
Revision 1.18: download - view: text, markup, annotated - select for diffs
Mon May 5 14:11:09 1997 UTC (14 years, 9 months ago) by kato
Branches: MAIN
Diff to: previous 1.17: preferred, colored
Changes since revision 1.17: +3 -3 lines
Use `M2' instead of `6x86 with MMX'. Cyrix seems to use `M2' officially.
Revision 1.17: download - view: text, markup, annotated - select for diffs
Sat Apr 26 11:45:07 1997 UTC (14 years, 9 months ago) by peter
Branches: MAIN
CVS tags: old_post_smp_merge
Diff to: previous 1.16: preferred, colored
Changes since revision 1.16: +5 -1 lines
Man the liferafts! Here comes the long awaited SMP -> -current merge! There are various options documented in i386/conf/LINT, there is more to come over the next few days. The kernel should run pretty much "as before" without the options to activate SMP mode. There are a handful of known "loose ends" that need to be fixed, but have been put off since the SMP kernel is in a moderately good condition at the moment. This commit is the result of the tinkering and testing over the last 14 months by many people. A special thanks to Steve Passe for implementing the APIC code!
Revision 1.16: download - view: text, markup, annotated - select for diffs
Sat Apr 26 04:08:45 1997 UTC (14 years, 9 months ago) by kato
Branches: MAIN
CVS tags: old_pre_smp_merge
Diff to: previous 1.15: preferred, colored
Changes since revision 1.15: +5 -2 lines
Add new cpu type, CPU_CY486DX, which shows Cyrix 486S/DX series CPUs, and initialization routine for those CPUs. Tested by: Bob Bishop <rb@gid.co.uk>
Revision 1.15: download - view: text, markup, annotated - select for diffs
Tue Apr 22 06:55:23 1997 UTC (14 years, 9 months ago) by jdp
Branches: MAIN
Diff to: previous 1.14: preferred, colored
Changes since revision 1.14: +5 -3 lines
Make the necessary changes so that an ELF kernel can be built. I have successfully built, booted, and run a number of different ELF kernel configurations, including GENERIC. LINT also builds and links cleanly, though I have not tried to boot it. The impact on developers is virtually nil, except for two things. All linker sets that might possibly be present in the kernel must be listed in "sys/i386/i386/setdefs.h". And all C symbols that are also referenced from assembly language code must be listed in "sys/i386/include/asnames.h". It so happens that failure to do these things will have no impact on the a.out kernel. But it will break the build of the ELF kernel. The ELF bootloader works, but it is not ready to commit quite yet.
Revision 1.14: download - view: text, markup, annotated - select for diffs
Sat Mar 22 18:51:57 1997 UTC (14 years, 10 months ago) by kato
Branches: MAIN
Diff to: previous 1.13: preferred, colored
Changes since revision 1.13: +290 -7 lines
Improved CPU identification and initialization routines. This supports All Cyrix CPUs, IBM Blue Lightning CPU and NexGen (now AMD) Nx586 CPU, and initialize special registers of Cyrix CPU and msr of IBM Blue Lightning CPU. If revision of Cyrix 6x86 CPU < 2.7, CPU cache is enabled in write-through mode. This can be disabled by kernel configuration options. Reviewed by: Bruce Evans <bde@freebsd.org> and Jordan K. Hubbard <jkh@freebsd.org>
Revision 1.13: download - view: text, markup, annotated - select for diffs
Sat Feb 22 09:32:19 1997 UTC (14 years, 11 months ago) by peter
Branches: MAIN
Diff to: previous 1.12: preferred, colored
Changes since revision 1.12: +1 -1 lines
Back out part 1 of the MCFH that changed $Id$ to $FreeBSD$. We are not ready for it yet.
Revision 1.7.2.3: download - view: text, markup, annotated - select for diffs
Sun Feb 2 18:47:05 1997 UTC (15 years ago) by joerg
Branches: old_RELENG_2_2
CVS tags: old_RELENG_2_2_2_RELEASE, old_RELENG_2_2_1_RELEASE, old_RELENG_2_2_0_RELEASE
Diff to: previous 1.7.2.2: preferred, colored; branchpoint 1.7: preferred, colored
Changes since revision 1.7.2.2: +21 -7 lines
YAMFC (rev 1.11 & 1.12: identify AMD CPUs)
Revision 1.12: download - view: text, markup, annotated - select for diffs
Fri Jan 24 12:39:11 1997 UTC (15 years ago) by obrien
Branches: MAIN
Diff to: previous 1.11: preferred, colored
Changes since revision 1.11: +8 -6 lines
KNF style police. Reported by: Bruce Thanks to: Bruce for also providing a diff.
Revision 1.11: download - view: text, markup, annotated - select for diffs
Sun Jan 19 01:56:55 1997 UTC (15 years ago) by obrien
Branches: MAIN
Diff to: previous 1.10: preferred, colored
Changes since revision 1.10: +18 -6 lines
Add bits to identify AMD K5 and K6 cpu's. Tested only on my AMD K5 PR-133. Bit values for K6 taken from AMD document on how to test such things. 2.2 Candidate.
Revision 1.10: download - view: text, markup, annotated - select for diffs
Tue Jan 14 06:38:47 1997 UTC (15 years ago) by jkh
Branches: MAIN
Diff to: previous 1.9: preferred, colored
Changes since revision 1.9: +1 -1 lines
Make the long-awaited change from $Id$ to $FreeBSD$ This will make a number of things easier in the future, as well as (finally!) avoiding the Id-smashing problem which has plagued developers for so long. Boy, I'm glad we're not using sup anymore. This update would have been insane otherwise.
Revision 1.7.2.2: download - view: text, markup, annotated - select for diffs
Tue Nov 12 13:54:49 1996 UTC (15 years, 3 months ago) by phk
Branches: old_RELENG_2_2
Diff to: previous 1.7.2.1: preferred, colored; branchpoint 1.7: preferred, colored
Changes since revision 1.7.2.1: +1 -2 lines
yamfc
Revision 1.9: download - view: text, markup, annotated - select for diffs
Tue Nov 12 13:36:52 1996 UTC (15 years, 3 months ago) by bde
Branches: MAIN
Diff to: previous 1.8: preferred, colored
Changes since revision 1.8: +1 -2 lines
Removed #include of "opt_temporary.h". All the temporary options went away, so this header is no longer generated. This change should be in 2.2. The old version shouldn;t have been in 2.2 (blush).
Revision 1.7.2.1: download - view: text, markup, annotated - select for diffs
Tue Nov 12 09:07:46 1996 UTC (15 years, 3 months ago) by phk
Branches: old_RELENG_2_2
Diff to: previous 1.7: preferred, colored
Changes since revision 1.7: +1 -13 lines
Mega-merge from -current
Revision 1.8: download - view: text, markup, annotated - select for diffs
Mon Nov 11 20:38:50 1996 UTC (15 years, 3 months ago) by bde
Branches: MAIN
Diff to: previous 1.7: preferred, colored
Changes since revision 1.7: +1 -13 lines
Replaced I586_OPTIMIZED_BCOPY and I586_OPTIMIZED_BZERO with boot-time negative-logic flags (flags 0x01 and 0x02 for npx0, defaulting to unset = on). This changes the default from off to on. The options have been in current for several months with no problems reported. Added a boot-time negative-logic flag for the old I5886_FAST_BCOPY option which went away too soon (flag 0x04 for npx0, defaulting to unset = on). Added a boot-time way to set the memory size (iosiz in config, iosize in userconfig for npx0). LINT: Removed old options. Documented npx0's flags and iosiz. options.i386: Removed old options. identcpu.c: Don't set the function pointers here. Setting them has to be delayed until after userconfig has had a chance to disable them and until after a good npx0 has been detected. machdep.c: Use npx0's iosize instead of MAXMEM if it is nonzero. support.s: Added vectors and glue code for copyin() and copyout(). Fixed ifdefs for i586_bzero(). Added ifdefs for i586_bcopy(). npx.c: Set the function pointers here. Clear hw_float when an npx exists but is too broken to use. Restored style from a year or three ago in npxattach().
Revision 1.7: download - view: text, markup, annotated - select for diffs
Wed Oct 9 19:47:15 1996 UTC (15 years, 4 months ago) by bde
Branches: MAIN
CVS tags: old_RELENG_2_2_BP
Branch point for: old_RELENG_2_2
Diff to: previous 1.6: preferred, colored
Changes since revision 1.6: +2 -1 lines
Put I*86_CPU defines in opt_cpu.h.
Revision 1.6: download - view: text, markup, annotated - select for diffs
Wed Oct 9 18:30:08 1996 UTC (15 years, 4 months ago) by bde
Branches: MAIN
Diff to: previous 1.5: preferred, colored
Changes since revision 1.5: +16 -4 lines
Enable the i586-optimized bcopy if the cpu is a "586" and option I586_OPTIMIZED_BCOPY is configured. Similarly for bzero/I586_OPTIMIZED_BZERO. Fake 586's had better have a hardware FPU with non-broken exception handling (we mask exceptions, but broken exception handling may trap on the instructions that do the masking). I guess this means that the routines won't work on most 386's or FPUless 486's even when they have a h/w FPU.
Revision 1.5: download - view: text, markup, annotated - select for diffs
Fri Sep 6 23:07:02 1996 UTC (15 years, 5 months ago) by phk
Branches: MAIN
Diff to: previous 1.4: preferred, colored
Changes since revision 1.4: +1 -15 lines
Remove devconf, it never grew up to be of any use.
Revision 1.4: download - view: text, markup, annotated - select for diffs
Sat Aug 10 08:04:24 1996 UTC (15 years, 6 months ago) by peter
Branches: MAIN
Diff to: previous 1.3: preferred, colored
Changes since revision 1.3: +15 -1 lines
Add recognition for the AMD 5x86 CPU models. Submitted by: A JOSEPH KOSHY <koshy@india.hp.com>
Revision 1.3: download - view: text, markup, annotated - select for diffs
Sat Aug 10 06:35:35 1996 UTC (15 years, 6 months ago) by peter
Branches: MAIN
Diff to: previous 1.2: preferred, colored
Changes since revision 1.2: +5 -3 lines
Trivial cosmetic tweak to make the i[56]86 CPU MHz reprting round to the nearest .01 Mhz rather than simply truncating it downwards. This hack makes this 89.999928 Mhz clock correctly round to the closer 90.00-MHz rather than 89.99-MHz: > i586 clock: 89999928 Hz, i8254 clock: 1193152 Hz > CPU: Pentium (90.00-MHz 586-class CPU)
Revision 1.2: download - view: text, markup, annotated - select for diffs
Fri Aug 2 21:15:47 1996 UTC (15 years, 6 months ago) by bde
Branches: MAIN
Diff to: previous 1.1: preferred, colored
Changes since revision 1.1: +3 -5 lines
Eliminated i586_ctr_rate. Use i586_ctr_freq instead.
Revision 1.1: download - view: text, markup, annotated - select for diffs
Mon Jul 8 19:44:38 1996 UTC (15 years, 7 months ago) by wollman
Branches: MAIN
Fix something that's been bugging me for a long time: move the CPU type identification code out of machdep.c and into a new file of its own. Hopefully other grot can be moved out of machdep.c as well (by other people) into more descriptively-named files.